948 lines
28 KiB
C
948 lines
28 KiB
C
/************************************************************************************
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* drivers/spi/spi_flash.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include <string.h>
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#include <nuttx/spi/spi_flash.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* Define the FLASH SIZE in bytes */
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#ifdef CONFIG_SPI_FLASH_1M
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# define CONFIG_SPI_FLASH_SIZE (128 * 1024)
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# define CONFIG_SPI_FLASH_CAPACITY 0x11
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#ifndef CONFIG_SPI_FLASH_SECTORSIZE
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# define CONFIG_SPI_FLASH_SECTORSIZE 2048
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#endif
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#endif
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#ifdef CONFIG_SPI_FLASH_8M
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# define CONFIG_SPI_FLASH_SIZE (1024 * 1024)
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# define CONFIG_SPI_FLASH_CAPACITY_SST26 0x3f
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# define CONFIG_SPI_FLASH_CAPACITY 0x14
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#endif
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#ifdef CONFIG_SPI_FLASH_32M
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# define CONFIG_SPI_FLASH_SIZE (4 * 1024 * 1024)
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# define CONFIG_SPI_FLASH_CAPACITY_SST26 0x42
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# define CONFIG_SPI_FLASH_CAPACITY 0x16
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#endif
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#ifdef CONFIG_SPI_FLASH_64M
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# define CONFIG_SPI_FLASH_SIZE (8 * 1024 * 1024)
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# define CONFIG_SPI_FLASH_CAPACITY_SST26 0x43
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# define CONFIG_SPI_FLASH_CAPACITY 0x17
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#endif
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#ifdef CONFIG_SPI_FLASH_128M
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# define CONFIG_SPI_FLASH_SIZE (16 * 1024 * 1024)
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# define CONFIG_SPI_FLASH_CAPACITY_SST26 0x44
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# define CONFIG_SPI_FLASH_CAPACITY 0x18
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#endif
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#ifndef CONFIG_SPI_FLASH_MANUFACTURER
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# define CONFIG_SPI_FLASH_MANUFACTURER 0x20
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#endif
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#ifndef CONFIG_SPI_FLASH_MEMORY_TYPE
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# define CONFIG_SPI_FLASH_MEMORY_TYPE 0x20
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#endif
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#ifndef CONFIG_SPI_FLASH_SECTORSIZE
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# define CONFIG_SPI_FLASH_SECTORSIZE 65536
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#endif
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#ifndef CONFIG_SPI_FLASH_SUBSECTORSIZE
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# define CONFIG_SPI_FLASH_SUBSECTORSIZE 4096
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#endif
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#ifndef CONFIG_SPI_FLASH_SECTORSIZE_MASK
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# define CONFIG_SPI_FLASH_SECTORSIZE_MASK (~(CONFIG_SPI_FLASH_SECTORSIZE-1))
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#endif
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#ifndef CONFIG_SPI_FLASH_SUBSECTORSIZE_MASK
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# define CONFIG_SPI_FLASH_SUBSECTORSIZE_MASK (~(CONFIG_SPI_FLASH_SUBSECTORSIZE-1))
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#endif
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#ifndef CONFIG_SPI_FLASH_PAGESIZE
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# define CONFIG_SPI_FLASH_PAGESIZE 256
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#endif
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#ifndef CONFIG_SPI_FLASH_PAGESIZE_MASK
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# define CONFIG_SPI_FLASH_PAGESIZE_MASK (CONFIG_SPI_FLASH_PAGESIZE-1)
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#endif
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/* Define FLASH States */
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#define SPI_FLASH_STATE_IDLE 0
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#define SPI_FLASH_STATE_RDID1 1
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#define SPI_FLASH_STATE_RDID2 2
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#define SPI_FLASH_STATE_RDID3 3
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#define SPI_FLASH_STATE_WREN 4
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#define SPI_FLASH_STATE_RDSR 5
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#define SPI_FLASH_STATE_SE1 6
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#define SPI_FLASH_STATE_SE2 7
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#define SPI_FLASH_STATE_SE3 8
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#define SPI_FLASH_STATE_PP1 9
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#define SPI_FLASH_STATE_PP2 10
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#define SPI_FLASH_STATE_PP3 11
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#define SPI_FLASH_STATE_PP4 12
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#define SPI_FLASH_STATE_READ1 13
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#define SPI_FLASH_STATE_READ2 14
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#define SPI_FLASH_STATE_READ3 15
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#define SPI_FLASH_STATE_READ4 16
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#define SPI_FLASH_STATE_FREAD_WAIT 17
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/* Instructions */
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/* Command Value N Description Addr Dummy Data */
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#define SPI_FLASH_WREN 0x06 /* 1 Write Enable 0 0 0 */
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#define SPI_FLASH_WRDI 0x04 /* 1 Write Disable 0 0 0 */
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#define SPI_FLASH_RDID 0x9f /* 1 Read Identification 0 0 1-3 */
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#define SPI_FLASH_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */
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#define SPI_FLASH_WRSR 0x01 /* 1 Write Status Register 0 0 1 */
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#define SPI_FLASH_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */
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#define SPI_FLASH_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */
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#define SPI_FLASH_PP 0x02 /* 1 Page Program 3 0 1-256 */
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#define SPI_FLASH_SE 0xd8 /* 1 Sector Erase 3 0 0 */
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#define SPI_FLASH_BE 0xc7 /* 1 Bulk Erase 0 0 0 */
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#define SPI_FLASH_DP 0xb9 /* 2 Deep power down 0 0 0 */
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#define SPI_FLASH_RES 0xab /* 2 Read Electronic Signature 0 3 >=1 */
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#define SPI_FLASH_SSE 0x20 /* 3 Sub-Sector Erase 0 0 0 */
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#define SPI_FLASH_DUMMY 0xa5
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/************************************************************************************
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* Private Types
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************************************************************************************/
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struct spi_flash_dev_s
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{
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struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
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FAR const char * name; /* Name of the flash type (m25p, w25, etc.) */
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uint8_t manuf;
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uint8_t type;
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uint8_t capacity;
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uint8_t last_cmd;
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uint32_t selected; /* SPIn base address */
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uint32_t read_data;
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int wren;
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int state;
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unsigned long address;
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unsigned char data[CONFIG_SPI_FLASH_SIZE];
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};
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/************************************************************************************
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* Private Function Prototypes
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************************************************************************************/
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/* SPI methods */
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static int spi_flash_lock(FAR struct spi_dev_s *dev, bool lock);
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static uint32_t spi_flash_setfrequency(FAR struct spi_dev_s *dev,
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uint32_t frequency);
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static void spi_flash_setmode(FAR struct spi_dev_s *dev,
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enum spi_mode_e mode);
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static void spi_flash_setbits(FAR struct spi_dev_s *dev, int nbits);
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static uint32_t spi_flash_send(FAR struct spi_dev_s *dev, uint32_t wd);
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static void spi_flash_exchange(FAR struct spi_dev_s *dev,
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FAR const void *txbuffer, FAR void *rxbuffer,
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size_t nwords);
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static void spi_flash_select(FAR struct spi_dev_s *dev, uint32_t devid,
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bool selected);
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static uint8_t spi_flash_status(FAR struct spi_dev_s *dev, uint32_t devid);
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#ifdef CONFIG_SPI_CMDDATA
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static int spi_flash_cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
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bool cmd);
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#endif
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#ifndef CONFIG_SPI_EXCHANGE
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static void spi_flash_sndblock(FAR struct spi_dev_s *dev,
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FAR const void *txbuffer, size_t nwords);
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static void spi_flash_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer,
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size_t nwords);
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#endif
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static void spi_flash_writeword(FAR struct spi_flash_dev_s *priv, uint16_t data);
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static uint32_t spi_flash_readword(FAR struct spi_flash_dev_s *priv);
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/************************************************************************************
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* Private Data
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************************************************************************************/
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static const struct spi_ops_s g_spiops =
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{
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spi_flash_lock, /* lock */
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spi_flash_select, /* select */
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spi_flash_setfrequency, /* setfrequency */
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#ifdef CONFIG_SPI_DELAY_CONTROL
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NULL, /* setdelay */
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#endif
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spi_flash_setmode, /* setmode */
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spi_flash_setbits, /* setbits */
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#ifdef CONFIG_SPI_HWFEATURES
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NULL, /* hwfeatures */
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#endif
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spi_flash_status, /* status */
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#ifdef CONFIG_SPI_CMDDATA
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spi_flash_cmddata, /* cmddata */
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#endif
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spi_flash_send, /* send */
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#ifdef CONFIG_SPI_EXCHANGE
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spi_flash_exchange, /* exchange */
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#else
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spi_flash_sndblock, /* sndblock */
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spi_flash_recvblock, /* recvblock */
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#endif
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#ifdef CONFIG_SPI_TRIGGER
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NULL, /* trigger */
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#endif
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NULL /* registercallback */
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};
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#ifdef CONFIG_SPI_FLASH_M25P
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struct spi_flash_dev_s g_spidev_m25p =
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{
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{
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&g_spiops /* spidev */
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},
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"m25p", /* name */
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0x20, /* manuf */
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0x20, /* type */
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CONFIG_SPI_FLASH_CAPACITY /* capacity */
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};
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#endif
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#ifdef CONFIG_SPI_FLASH_SST26
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struct spi_flash_dev_s g_spidev_sst26 =
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{
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{
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&g_spiops /* spidev */
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},
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"sst26", /* name */
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0xbf, /* manuf */
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#ifdef CONFIG_SST26_MEMORY_TYPE
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CONFIG_SST26_MEMORY_TYPE, /* type */
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#else
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0x25, /* type */
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#endif
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CONFIG_SPI_FLASH_CAPACITY_SST26 /* capacity */
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};
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#endif
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#ifdef CONFIG_SPI_FLASH_W25
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struct spi_flash_dev_s g_spidev_w25 =
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{
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{
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&g_spiops /* spidev */
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},
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"w25", /* name */
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0xef, /* manuf */
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0x30, /* type */
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CONFIG_SPI_FLASH_CAPACITY /* capacity */
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};
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#endif
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#ifdef CONFIG_SPI_FLASH_CUSTOM
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struct spi_flash_dev_s g_spidev_custom =
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{
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{
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&g_spiops /* spidev */
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},
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"custom", /* name */
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CONFIG_SPI_FLASH_MANUFACTURER, /* manuf */
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CONFIG_SPI_FLASH_MEMORY_TYPE, /* type */
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CONFIG_SPI_FLASH_CAPACITY /* capacity */
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};
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#endif
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struct spi_flash_dev_s *gp_spidev[] =
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{
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#ifdef CONFIG_SPI_FLASH_M25P
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&g_spidev_m25p,
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#endif
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#ifdef CONFIG_SPI_FLASH_SST26
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&g_spidev_sst26,
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#endif
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#ifdef CONFIG_SPI_FLASH_W25
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&g_spidev_w25,
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#endif
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#ifdef CONFIG_SPI_FLASH_CUSTOM
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&g_spidev_custom,
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#endif
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/* Null termination pointer at end of list */
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NULL
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};
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: spi_flash_lock
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*
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* Description:
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* On SPI buses where there are multiple devices, it will be necessary to
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* lock SPI to have exclusive access to the buses for a sequence of
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* transfers. The bus should be locked before the chip is selected. After
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* locking the SPI bus, the caller should then also call the setfrequency,
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* setbits, and setmode methods to make sure that the SPI is properly
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* configured for the device. If the SPI bus is being shared, then it
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* may have been left in an incompatible state.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* lock - true: Lock spi bus, false: unlock SPI bus
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static int spi_flash_lock(FAR struct spi_dev_s *dev, bool lock)
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{
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return OK;
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}
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/************************************************************************************
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* Name: spi_flash_select
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*
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* Description:
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* Process select logic for the FLASH.
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static void spi_flash_select(FAR struct spi_dev_s *dev, uint32_t devid,
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bool selected)
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{
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FAR struct spi_flash_dev_s *priv = (FAR struct spi_flash_dev_s *)dev;
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if (devid == SPIDEV_FLASH(0))
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{
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priv->selected = selected;
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/* As part of an de-select, ensure the WREN bit is cleared */
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if (!selected)
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{
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if (priv->last_cmd != SPI_FLASH_WREN)
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{
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priv->wren = 0;
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}
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priv->state = SPI_FLASH_STATE_IDLE;
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}
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}
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}
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/************************************************************************************
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* Name: spi_flash_cmddata
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*
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* Description:
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* Perform SPI Command operations
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*
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* Returned Value:
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* Always returns zero
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*
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************************************************************************************/
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#ifdef CONFIG_SPI_CMDDATA
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static int spi_flash_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return 0;
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}
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#endif
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/************************************************************************************
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* Name: spi_flash_setfrequency
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*
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* Description:
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* Set the SPI frequency.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* frequency - The SPI frequency requested
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*
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* Returned Value:
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* Returns the actual frequency selected
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*
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************************************************************************************/
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static uint32_t spi_flash_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
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{
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return frequency;
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}
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/************************************************************************************
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* Name: spi_flash_setmode
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*
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* Description:
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* Set the SPI mode. see enum spi_mode_e for mode definitions
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*
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* Input Parameters:
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* dev - Device-specific state data
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* mode - The SPI mode requested
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*
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* Returned Value:
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* Returns the actual frequency selected
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*
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************************************************************************************/
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static void spi_flash_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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{
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}
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/************************************************************************************
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* Name: spi_flash_setbits
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*
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* Description:
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* Set the number of bits per word.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* nbits - The number of bits requested
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static void spi_flash_setbits(FAR struct spi_dev_s *dev, int nbits)
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{
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}
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/************************************************************************************
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* Name: spi_flash_status
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*
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* Description:
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* Set the SPI bus status
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*
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* Returned Value:
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* Always returns zero
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*
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************************************************************************************/
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static uint8_t spi_flash_status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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/************************************************************************************
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* Name: spi_flash_send
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*
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* Description:
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* Exchange one word on SPI
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*
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* Input Parameters:
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* dev - Device-specific state data
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* wd - The word to send. the size of the data is determined by the
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* number of bits selected for the SPI interface.
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*
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* Returned Value:
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* response
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*
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************************************************************************************/
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static uint32_t spi_flash_send(FAR struct spi_dev_s *dev, uint32_t wd)
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{
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FAR struct spi_flash_dev_s *priv = (FAR struct spi_flash_dev_s *)dev;
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uint32_t ret;
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if (priv->selected)
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{
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spi_flash_writeword(priv, wd);
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ret = spi_flash_readword(priv);
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}
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else
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{
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ret = 0xff;
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}
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return ret;
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}
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/************************************************************************************
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* Name: spi_flash_exchange (no DMA). aka spi_exchange_nodma
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*
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* Description:
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* Exchange a block of data on SPI without using DMA
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*
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* Input Parameters:
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* dev - Device-specific state data
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* txbuffer - A pointer to the buffer of data to be sent
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* rxbuffer - A pointer to a buffer in which to receive data
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* nwords - the length of data to be exchanged in units of words.
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* The wordsize is determined by the number of bits-per-word
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* selected for the SPI interface. If nbits <= 8, the data is
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* packed into uint8_t's; if nbits >8, the data is packed into
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* uint16_t's
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static void spi_flash_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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FAR void *rxbuffer, size_t nwords)
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{
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spiinfo("txbuffer=%p rxbuffer=%p nwords=%zu\n", txbuffer, rxbuffer, nwords);
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/* 8-bit mode */
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FAR const uint8_t *src = (FAR const uint8_t *)txbuffer;
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FAR uint8_t *dest = (FAR uint8_t *)rxbuffer;
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uint8_t word;
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while (nwords-- > 0)
|
|
{
|
|
/* Get the next word to write. Is there a source buffer? */
|
|
|
|
if (src)
|
|
{
|
|
word = *src++;
|
|
}
|
|
else
|
|
{
|
|
word = 0xff;
|
|
}
|
|
|
|
/* Exchange one word */
|
|
|
|
word = (uint8_t)spi_flash_send(dev, (uint16_t)word);
|
|
|
|
/* Is there a buffer to receive the return value? */
|
|
|
|
if (dest)
|
|
{
|
|
*dest++ = word;
|
|
}
|
|
}
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: spi_sndblock
|
|
*
|
|
* Description:
|
|
* Send a block of data on SPI
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* txbuffer - A pointer to the buffer of data to be sent
|
|
* nwords - the length of data to send from the buffer in number of words.
|
|
* The wordsize is determined by the number of bits-per-word
|
|
* selected for the SPI interface. If nbits <= 8, the data is
|
|
* packed into uint8_t's; if nbits >8, the data is packed into
|
|
* uint16_t's
|
|
*
|
|
* Returned Value:
|
|
* None
|
|
*
|
|
************************************************************************************/
|
|
|
|
#ifndef CONFIG_SPI_EXCHANGE
|
|
static void spi_flash_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
|
|
size_t nwords)
|
|
{
|
|
spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
|
|
return spi_flash_exchange(dev, txbuffer, NULL, nwords);
|
|
}
|
|
#endif
|
|
|
|
/************************************************************************************
|
|
* Name: spi_recvblock
|
|
*
|
|
* Description:
|
|
* Receive a block of data from SPI
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* rxbuffer - A pointer to the buffer in which to receive data
|
|
* nwords - the length of data that can be received in the buffer in number
|
|
* of words. The wordsize is determined by the number of bits-per-word
|
|
* selected for the SPI interface. If nbits <= 8, the data is
|
|
* packed into uint8_t's; if nbits >8, the data is packed into
|
|
* uint16_t's
|
|
*
|
|
* Returned Value:
|
|
* None
|
|
*
|
|
************************************************************************************/
|
|
|
|
#ifndef CONFIG_SPI_EXCHANGE
|
|
static void spi_flash_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer,
|
|
size_t nwords)
|
|
{
|
|
spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
|
|
return spi_flash_exchange(dev, NULL, rxbuffer, nwords);
|
|
}
|
|
#endif
|
|
|
|
/************************************************************************************
|
|
* Name: spi_flash_sectorerase
|
|
*
|
|
* Description:
|
|
* Erase one sector
|
|
*
|
|
* Input Parameters:
|
|
* priv - Device-specific state data
|
|
*
|
|
* Returned Value:
|
|
* None
|
|
*
|
|
************************************************************************************/
|
|
|
|
static void spi_flash_sectorerase(FAR struct spi_flash_dev_s *priv)
|
|
{
|
|
uint32_t address;
|
|
uint32_t len = 0;
|
|
|
|
/* Ensure the WREN bit is set before any erase operation */
|
|
|
|
if (priv->wren)
|
|
{
|
|
address = priv->address;
|
|
if (priv->last_cmd == SPI_FLASH_SE)
|
|
{
|
|
address &= CONFIG_SPI_FLASH_SECTORSIZE_MASK;
|
|
len = CONFIG_SPI_FLASH_SECTORSIZE;
|
|
}
|
|
else if (priv->last_cmd == SPI_FLASH_SSE)
|
|
{
|
|
address &= CONFIG_SPI_FLASH_SUBSECTORSIZE_MASK;
|
|
len = CONFIG_SPI_FLASH_SUBSECTORSIZE;
|
|
}
|
|
|
|
/* Now perform the erase */
|
|
|
|
memset(&priv->data[address], 0xff, len);
|
|
}
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: spi_flash_writeword
|
|
*
|
|
* Description:
|
|
* Write a word (byte in our case) to the FLASH state machine.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* data - the data to send to the simulated FLASH
|
|
*
|
|
* Returned Value:
|
|
* None
|
|
*
|
|
************************************************************************************/
|
|
|
|
static void spi_flash_writeword(FAR struct spi_flash_dev_s *priv, uint16_t data)
|
|
{
|
|
switch (priv->state)
|
|
{
|
|
case SPI_FLASH_STATE_IDLE:
|
|
priv->last_cmd = data;
|
|
priv->read_data = 0xff;
|
|
switch (data)
|
|
{
|
|
case SPI_FLASH_RDID:
|
|
priv->state = SPI_FLASH_STATE_RDID1;
|
|
break;
|
|
|
|
case SPI_FLASH_WREN:
|
|
priv->wren = 1;
|
|
priv->state = SPI_FLASH_STATE_WREN;
|
|
break;
|
|
|
|
case SPI_FLASH_RDSR:
|
|
priv->state = SPI_FLASH_STATE_RDSR;
|
|
break;
|
|
|
|
/* Sector / Subsector erase */
|
|
|
|
case SPI_FLASH_SE:
|
|
case SPI_FLASH_SSE:
|
|
priv->state = SPI_FLASH_STATE_SE1;
|
|
break;
|
|
|
|
/* Bulk Erase */
|
|
|
|
case SPI_FLASH_BE:
|
|
priv->state = SPI_FLASH_STATE_IDLE;
|
|
if (priv->wren)
|
|
{
|
|
memset(priv->data, 0xff, CONFIG_SPI_FLASH_SIZE);
|
|
}
|
|
break;
|
|
|
|
case SPI_FLASH_PP:
|
|
priv->state = SPI_FLASH_STATE_PP1;
|
|
break;
|
|
|
|
case SPI_FLASH_READ:
|
|
case SPI_FLASH_FAST_READ:
|
|
priv->state = SPI_FLASH_STATE_READ1;
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
break;
|
|
|
|
/* Read ID States */
|
|
|
|
case SPI_FLASH_STATE_RDID1:
|
|
priv->read_data = priv->manuf; /* CONFIG_SPI_FLASH_MANUFACTURER; */
|
|
priv->state = SPI_FLASH_STATE_RDID2;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_RDID2:
|
|
priv->read_data = priv->type; /* CONFIG_SPI_FLASH_MEMORY_TYPE; */
|
|
priv->state = SPI_FLASH_STATE_RDID3;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_RDID3:
|
|
priv->read_data = priv->capacity; /* CONFIG_SPI_FLASH_CAPACITY; */
|
|
priv->state = SPI_FLASH_STATE_IDLE;
|
|
break;
|
|
|
|
/* WREN state - if we receive any bytes here, then we abort the WREN */
|
|
|
|
case SPI_FLASH_STATE_WREN:
|
|
priv->wren = 0;
|
|
break;
|
|
|
|
/* Read Status Register state */
|
|
|
|
case SPI_FLASH_STATE_RDSR:
|
|
priv->read_data = 0;
|
|
priv->state = SPI_FLASH_STATE_IDLE;
|
|
break;
|
|
|
|
/* Sector and Sub-Sector erase states - Read the address */
|
|
|
|
case SPI_FLASH_STATE_SE1:
|
|
priv->address = data << 16;
|
|
priv->state = SPI_FLASH_STATE_SE2;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_SE2:
|
|
priv->address |= data << 8;
|
|
priv->state = SPI_FLASH_STATE_SE3;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_SE3:
|
|
priv->address |= data;
|
|
|
|
/* Now perform the sector or sub-sector erase. Really this should
|
|
* be done during the deselect, but this is just a simulation .
|
|
*/
|
|
|
|
spi_flash_sectorerase(priv);
|
|
break;
|
|
|
|
/* Page Program. We could reuse the SE states, but let's keep it clean. */
|
|
|
|
case SPI_FLASH_STATE_PP1:
|
|
priv->address = data << 16;
|
|
priv->state = SPI_FLASH_STATE_PP2;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_PP2:
|
|
priv->address |= data << 8;
|
|
priv->state = SPI_FLASH_STATE_PP3;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_PP3:
|
|
priv->address |= data;
|
|
priv->state = SPI_FLASH_STATE_PP4;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_PP4:
|
|
|
|
/* In this state we actually write data (if WREN enabled) */
|
|
|
|
if (priv->wren)
|
|
{
|
|
priv->data[priv->address] = data;
|
|
}
|
|
|
|
/* Now increment the address. We do a page wrap here to simulate
|
|
* the actual FLASH.
|
|
*/
|
|
|
|
if ((priv->address & CONFIG_SPI_FLASH_PAGESIZE_MASK) ==
|
|
CONFIG_SPI_FLASH_PAGESIZE_MASK)
|
|
{
|
|
priv->address &= !CONFIG_SPI_FLASH_PAGESIZE_MASK;
|
|
}
|
|
else
|
|
{
|
|
priv->address++;
|
|
}
|
|
break;
|
|
|
|
/* Read data */
|
|
|
|
case SPI_FLASH_STATE_READ1:
|
|
priv->address = data << 16;
|
|
priv->state = SPI_FLASH_STATE_READ2;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_READ2:
|
|
priv->address |= data << 8;
|
|
priv->state = SPI_FLASH_STATE_READ3;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_READ3:
|
|
priv->address |= data;
|
|
if (priv->last_cmd == SPI_FLASH_FAST_READ)
|
|
{
|
|
priv->state = SPI_FLASH_STATE_FREAD_WAIT;
|
|
}
|
|
else
|
|
{
|
|
priv->state = SPI_FLASH_STATE_READ4;
|
|
}
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_FREAD_WAIT:
|
|
priv->read_data = 0xff;
|
|
priv->state = SPI_FLASH_STATE_READ4;
|
|
break;
|
|
|
|
case SPI_FLASH_STATE_READ4:
|
|
|
|
/* In this state perform data reads until de-selected. */
|
|
|
|
priv->read_data = priv->data[priv->address++];
|
|
if (priv->address == CONFIG_SPI_FLASH_SIZE)
|
|
{
|
|
priv->address = 0;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
priv->state = SPI_FLASH_STATE_IDLE;
|
|
priv->read_data = 0xff;
|
|
break;
|
|
}
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: spi_flash_readword
|
|
*
|
|
* Description:
|
|
* Read a word (byte in our case) from the simulated FLASH.
|
|
*
|
|
* Input Parameters:
|
|
* priv - Device-specific state data
|
|
*
|
|
* Returned Value:
|
|
* Byte read from the simulated FLASH device
|
|
*
|
|
************************************************************************************/
|
|
|
|
static uint32_t spi_flash_readword(FAR struct spi_flash_dev_s *priv)
|
|
{
|
|
return priv->read_data;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Public Functions
|
|
************************************************************************************/
|
|
|
|
/************************************************************************************
|
|
* Name: up_spi_flashinitialize
|
|
*
|
|
* Description:
|
|
* Initialize the selected SPI port
|
|
*
|
|
* Input Parameters:
|
|
* Port number (for hardware that has multiple SPI interfaces)
|
|
*
|
|
* Returned Value:
|
|
* Valid SPI device structure reference on success; a NULL on failure
|
|
*
|
|
************************************************************************************/
|
|
|
|
FAR struct spi_dev_s *spi_flash_initialize(FAR const char *name)
|
|
{
|
|
FAR struct spi_flash_dev_s *priv = NULL;
|
|
int x;
|
|
|
|
/* Default to custom FLASH if not specified */
|
|
|
|
if (name == NULL)
|
|
{
|
|
name = "custom";
|
|
}
|
|
|
|
/* Loop through all supported flash devices */
|
|
|
|
for (x = 0; gp_spidev[x] != NULL; x++)
|
|
{
|
|
/* Search for the specified flash by name */
|
|
|
|
if (strcmp(name, gp_spidev[x]->name) == 0)
|
|
{
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Test if flash device found */
|
|
|
|
if (gp_spidev[x] == NULL)
|
|
{
|
|
/* Specified device not supported */
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/* Configure the selected flash device */
|
|
|
|
priv = gp_spidev[x];
|
|
priv->selected = 0;
|
|
priv->wren = 0;
|
|
priv->address = 0;
|
|
priv->state = SPI_FLASH_STATE_IDLE;
|
|
priv->read_data = 0xff;
|
|
priv->last_cmd = 0xff;
|
|
memset(&priv->data[0], 0xff, sizeof(priv->data));
|
|
|
|
return (FAR struct spi_dev_s *)priv;
|
|
}
|