215 lines
6.1 KiB
C
215 lines
6.1 KiB
C
/****************************************************************************
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* arch/mips/include/pic32mx/irq.h
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*
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* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_MIPS_INCLUDE_PIC32MX_IRQ_H
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#define __ARCH_MIPS_INCLUDE_PIC32MX_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/pic32mx/chip.h>
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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# include <arch/pic32mx/irq_1xx2xx.h>
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#elif defined(CHIP_PIC32MX3) || defined(CHIP_PIC32MX4)
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# include <arch/pic32mx/irq_3xx4xx.h>
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#elif defined(CHIP_PIC32MX5) || defined(CHIP_PIC32MX6) || defined(CHIP_PIC32MX7)
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# include <arch/pic32mx/irq_5xx6xx7xx.h>
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#else
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# error "Unknown PIC32MX family
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Name: cp0_getintctl
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*
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* Description:
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* Get the CP0 IntCtl register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline uint32_t cp0_getintctl(void)
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{
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register uint32_t intctl;
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t mfc0 %0, $12, 1\n" /* Get CP0 IntCtl register */
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"\t.set pop\n"
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: "=r" (intctl)
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:
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: "memory"
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);
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return intctl;
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}
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/****************************************************************************
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* Name: cp0_putintctl
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*
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* Description:
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* Write the CP0 IntCtl register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void cp0_putintctl(uint32_t intctl)
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{
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t.set noreorder\n"
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"\tmtc0 %0, $12, 1\n" /* Set the IntCtl to the provided value */
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"\t.set pop\n"
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:
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: "r" (intctl)
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: "memory"
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);
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}
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/****************************************************************************
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* Name: cp0_getebase
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*
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* Description:
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* Get the CP0 EBASE register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline uint32_t cp0_getebase(void)
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{
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register uint32_t ebase;
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t mfc0 %0, $15, 1\n" /* Get CP0 EBASE register */
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"\t.set pop\n"
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: "=r" (ebase)
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:
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: "memory"
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);
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return ebase;
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}
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/****************************************************************************
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* Name: cp0_putebase
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*
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* Description:
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* Write the CP0 EBASE register
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void cp0_putebase(uint32_t ebase)
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{
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__asm__ __volatile__
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(
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"\t.set push\n"
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"\t.set noat\n"
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"\t.set noreorder\n"
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"\tmtc0 %0, $15, 1\n" /* Set the EBASE to the provided value */
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"\t.set pop\n"
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:
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: "r" (ebase)
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: "memory"
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);
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}
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MIPS_INCLUDE_PIC32MX_IRQ_H */
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