237 lines
8.1 KiB
C
237 lines
8.1 KiB
C
/****************************************************************************
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* include/nuttx/can/sja1000.h
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*
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* SJA1000 CAN driver based on esp32c3_twai.h
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*
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* License header retained from original source.
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_CAN_SJA1000_H
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#define __INCLUDE_NUTTX_CAN_SJA1000_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* CAN hardware-dependent bit-timing constant
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*
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* Used for calculating and checking bit-timing parameters
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*/
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struct can_bittiming_const_s
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{
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char name[16]; /* Name of the CAN controller hardware */
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uint32_t tseg1_min; /* Time segment 1 = prop_seg + phase_seg1 */
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uint32_t tseg1_max;
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uint32_t tseg2_min; /* Time segment 2 = phase_seg2 */
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uint32_t tseg2_max;
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uint32_t sjw_max; /* Synchronisation jump width */
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uint32_t brp_min; /* Bit-rate prescaler */
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uint32_t brp_max;
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uint32_t brp_inc;
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};
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/* Type of the SJA1000 interrupt handling callback */
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struct sja1000_config_s; /* Forward reference */
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typedef CODE void (*sja1000_handler_t)(FAR struct sja1000_config_s *config,
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FAR void *arg);
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/* A reference to a structure of this type must be passed to the SJA1000
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* driver when the driver is instantiated. This structure provides
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* information about the configuration of the SJA1000 and provides some
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* board-specific hooks.
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*
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* Memory for this structure is provided by the caller. It is not copied by
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* the driver and is presumed to persist while the driver is active. The
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* memory must be writeable because, under certain circumstances, the driver
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* may modify the frequency.
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*/
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struct sja1000_config_s
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{
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/* Device configuration */
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const struct can_bittiming_const_s *bittiming_const;
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uint8_t port; /* SJA1000 device port number */
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uint8_t periph; /* Peripheral ID (optional) */
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uint8_t irq; /* IRQ associated with this SJA1000 */
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uint8_t cpu; /* CPU ID */
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int8_t cpuint; /* CPU interrupt assigned to this SJA1000 */
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uint32_t bitrate; /* Configured bit rate */
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uint32_t samplep; /* Configured sample point */
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uint32_t sjw; /* Synchronization jump width */
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uint32_t clk_freq; /* Peripheral clock frequency */
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bool loopback; /* Enable loopback mode */
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bool triple_sample; /* Enable triple-sampling of CAN BUS */
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/* Device characterization */
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/* IRQ/GPIO access callbacks. These operations all hidden behind
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* callbacks to isolate the driver from differences in GPIO
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* interrupt handling by varying boards and MCUs.
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*
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* attach - Attach interrupt handler to the interrupt
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* detach - Detach interrupt handler from the interrupt
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*/
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CODE int (*attach)(FAR struct sja1000_config_s *config,
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sja1000_handler_t handler, FAR void *arg);
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CODE int (*detach)(FAR struct sja1000_config_s *config);
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};
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/* This structure provides the current state of a CAN peripheral */
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struct sja1000_dev_s
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{
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FAR struct sja1000_config_s *config; /* The constant configuration */
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uint8_t filters; /* STD/EXT filter bit allocator. */
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uint8_t nalloc; /* Number of allocated filters */
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uint32_t base; /* SJA1000 register base address */
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#ifdef CONFIG_ARCH_HAVE_MULTICPU
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spinlock_t lock; /* Device specific lock */
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#endif /* CONFIG_ARCH_HAVE_MULTICPU */
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/* Register read/write callbacks. These operations all hidden behind
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* callbacks to isolate the driver from differences in register read/write
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* handling by varying boards and MCUs.
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*
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* getreg - Read from a register address
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* putreg - Write to a register address
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*/
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CODE uint32_t (*getreg)(struct sja1000_dev_s *sja_priv, uint32_t reg);
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CODE void (*putreg)(struct sja1000_dev_s *sja_priv, uint32_t reg,
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uint32_t value);
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CODE void (*modifyreg32)(struct sja1000_dev_s *sja_priv, uint32_t reg,
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uint32_t clearbits, uint32_t setbits);
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};
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifdef CONFIG_CAN_SJA1000
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Name: sja1000_getreg
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*
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* Description:
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* Read the value of an SJA1000 register.
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*
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* Input Parameters:
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* priv - sja1000 lower-half driver context
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* reg - The SJA1000 register address to read
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*
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* Returned Value:
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*
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****************************************************************************/
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static inline uint32_t sja1000_getreg(struct sja1000_dev_s *sja_priv,
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uint32_t reg)
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{
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return sja_priv->getreg(sja_priv, reg);
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}
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/****************************************************************************
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* Name: sja1000_putreg
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*
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* Description:
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* Set the value of an SJA1000 register.
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*
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* Input Parameters:
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* priv - sja1000 lower-half driver context
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* reg - The SJA1000 register address to write
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* value - The value to write to the register
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void sja1000_putreg(struct sja1000_dev_s *sja_priv,
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uint32_t reg, uint32_t value)
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{
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sja_priv->putreg(sja_priv, reg, value);
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}
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/****************************************************************************
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* Name: sja1000_modifyreg32
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*
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* Description:
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* Modify the value of an SJA1000 register.
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*
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* Input Parameters:
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* priv - sja1000 lower-half driver context
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* reg - The SJA1000 register address to modify
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* clearbits - Bitmask of the bits to clear in a register
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* setbits - Bitmask of the bits to set in a register
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void sja1000_modifyreg32(struct sja1000_dev_s *sja_priv,
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uint32_t reg, uint32_t clearbits, uint32_t setbits)
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{
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sja_priv->modifyreg32(sja_priv, reg, clearbits, setbits);
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}
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: sja1000_instantiate
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*
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* Description:
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* Initialize the selected SJA1000 CAN Bus Controller
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*
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* Input Parameters:
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* priv - An instance of the "lower half" CAN driver state structure.
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*
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* Returned Value:
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* Valid CAN device structure reference on success; a NULL on failure
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*
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****************************************************************************/
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struct can_dev_s;
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FAR struct can_dev_s *sja1000_instantiate(FAR struct sja1000_dev_s *priv);
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_CAN_SJA1000 */
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#endif /* __INCLUDE_NUTTX_CAN_SJA1000_H */
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