366 lines
12 KiB
C
366 lines
12 KiB
C
/****************************************************************************
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* boards/arm/samv7/same70-qmtech/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_SAMV7_SAME70_QMTECH_INCLUDE_BOARD_H
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#define __BOARDS_ARM_SAMV7_SAME70_QMTECH_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* After power-on reset, the SAME70N device is running out of the Master
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* Clock using the Fast RC Oscillator running at 4 MHz.
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*
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* MAINOSC: Frequency = 12MHz (crystal)
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*
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* 300MHz Settings:
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* PLLA: PLL Divider = 1, Multiplier = 20 to generate PLLACK = 240MHz
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* Master Clock (MCK): Source = PLLACK,
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* Prescalar = 1 to generate MCK = 120MHz
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* CPU clock: 120MHz
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*
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* There are two on-board crystals:
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*/
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#define BOARD_HAVE_SLOWXTAL 1 /* Slow crystal is populated */
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#define BOARD_SLOWCLK_FREQUENCY (32768) /* 32.768 kHz slow crystal oscillator */
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#define BOARD_MAINOSC_FREQUENCY (12000000) /* 12 MHz main oscillator */
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/* Main oscillator register settings.
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*
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* The main oscillator could be either the embedded 4/8/12 MHz fast RC
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* oscillators or an external 3-20 MHz crystal or ceramic resonator.
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* The external clock source is selected by default in sam_clockconfig.c.
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* Here we need to specify the main oscillator start-up time.
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*
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* REVISIT... this is old information:
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* The start up time should be should be:
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*
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* Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles.
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*/
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#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
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#define BOARD_CKGR_MOR_MOSCXTENBY (PMC_CKGR_MOR_MOSCXTEN) /* Crystal Oscillator Enable */
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/* PLLA configuration.
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*
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* Divider = 1
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* Multiplier = 25
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*
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* Yields:
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*
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* PLLACK = 25 * 12MHz / 1 = 300MHz
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*/
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#define BOARD_CKGR_PLLAR_STMODE PMC_CKGR_PLLAR_STMODE_FAST
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#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
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#define BOARD_CKGR_PLLAR_MUL PMC_CKGR_PLLAR_MUL(24)
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#define BOARD_CKGR_PLLAR_DIV PMC_CKGR_PLLAR_DIV_BYPASS
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/* PMC master clock register settings.
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*
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* BOARD_PMC_MCKR_CSS - The source of main clock input. This may be one of:
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*
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* PMC_MCKR_CSS_SLOW Slow Clock
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* PMC_MCKR_CSS_MAIN Main Clock
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* PMC_MCKR_CSS_PLLA PLLA Clock
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* PMC_MCKR_CSS_UPLL Divided UPLL Clock
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*
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* BOARD_PMC_MCKR_PRES - Source clock pre-scaler. May be one of:
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*
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* PMC_MCKR_PRES_DIV1 Selected clock
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* PMC_MCKR_PRES_DIV2 Selected clock divided by 2
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* PMC_MCKR_PRES_DIV4 Selected clock divided by 4
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* PMC_MCKR_PRES_DIV8 Selected clock divided by 8
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* PMC_MCKR_PRES_DIV16 Selected clock divided by 16
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* PMC_MCKR_PRES_DIV32 Selected clock divided by 32
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* PMC_MCKR_PRES_DIV64 Selected clock divided by 64
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* PMC_MCKR_PRES_DIV3 Selected clock divided by 3
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*
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* The prescaler determines (1) the CPU clock and (2) the input into the
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* second divider that then generates the Master Clock (MCK). MCK is the
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* source clock of the peripheral clocks.
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*
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* BOARD_PMC_MCKR_MDIV - MCK divider. May be one of:
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*
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* PMC_MCKR_MDIV_DIV1 Master Clock = Prescaler Output Clock / 1
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* PMC_MCKR_MDIV_DIV2 Master Clock = Prescaler Output Clock / 2
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* PMC_MCKR_MDIV_DIV4 Master Clock = Prescaler Output Clock / 4
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* PMC_MCKR_MDIV_DIV3 Master Clock = Prescaler Output Clock / 3
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*/
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#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA /* Source = PLLA */
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#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1 /* Prescaler = /1 */
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#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_DIV2 /* MCK divider = /2 */
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/* USB clocking */
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#define BOARD_PMC_MCKR_UPLLDIV2 0 /* UPLL clock not divided by 2 */
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/* Resulting frequencies */
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#define BOARD_PLLA_FREQUENCY (300000000) /* PLLACK: 25 * 12Mhz / 1 */
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#define BOARD_CPU_FREQUENCY (300000000) /* CPU: PLLACK / 1 */
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#define BOARD_MCK_FREQUENCY (150000000) /* MCK: PLLACK / 1 / 2 */
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#undef BOARD_UPLL_FREQUENCY /* To be provided */
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/* HSMCI clocking
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*
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* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
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* divided by (2*(CLKDIV) + CLOCKODD + 2).
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*
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* MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2)
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*
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* Where CLKDIV has a range of 0-255.
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*/
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/* MCK = 150MHz, CLKDIV = 186,
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* MCI_SPEED = 150MHz / (2*186 + 1 + 2) = 400 KHz
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*/
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#define HSMCI_INIT_CLKDIV ((186 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD)
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/* MCK = 150MHz, CLKDIV = 3 w/CLOCKODD,
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* MCI_SPEED = 150MHz /(2*3 + 0 + 2) = 18.75 MHz
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*/
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#define HSMCI_MMCXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT)
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/* MCK = 150MHz, CLKDIV = 2,
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* MCI_SPEED = 150MHz /(2*2 + 0 + 2) = 25 MHz
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*/
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#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT)
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#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
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/* FLASH wait states.
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*
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* Wait states Max frequency at 105 centigrade (STH conditions)
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*
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* VDDIO
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* 1.62V 2.7V
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* --- ------- -------
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* 0 26 MHz 30 MHz
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* 1 52 MHz 62 MHz
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* 2 78 MHz 93 MHz
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* 3 104 MHz 124 MHz
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* 4 131 MHz 150 MHz
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* 5 150 MHz --- MHz
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*
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* Given: VDDIO=3.3V, VDDCORE=1.2V, MCK=150MHz
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*/
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#define BOARD_FWS 4
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/* LED definitions **********************************************************/
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/* LEDs
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*
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* A single LED is available driven by PA15.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED0 0
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED0_BIT (1 << BOARD_LED0)
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/* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/sam_autoleds.c. The LEDs are used to encode
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* OS-related events as follows:
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*
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* ------------------- ---------------------------- ------
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* SYMBOL Meaning LED
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* ------------------- ---------------------------- ------
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*/
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#define LED_STARTED 0 /* NuttX has been started OFF */
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#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
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#define LED_STACKCREATED 1 /* Idle stack created ON */
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#define LED_INIRQ 2 /* In an interrupt N/C */
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#define LED_SIGNAL 2 /* In a signal handler N/C */
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#define LED_ASSERTION 2 /* An assertion failed N/C */
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#define LED_PANIC 3 /* The system has crashed FLASH */
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#undef LED_IDLE /* MCU is is sleep mode Not used */
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/* Thus is LED is statically on, NuttX has successfully booted and is,
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* apparently, running normally. If LED is flashing at approximately
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* 2Hz, then a fatal error has been detected and the system has halted.
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*/
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/* Button definitions *******************************************************/
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/* Buttons
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*
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* SAM E70 QMTECH contains two mechanical buttons. One button is the RESET
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* button connected to the SAM E70 reset line and the other, PA21, is a
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* generic user configurable button.
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* When a button is pressed it will drive the I/O line to GND.
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*
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* NOTE:
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* There are no pull-up resistors connected to the generic user buttons
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* so it is necessary to enable the internal pull-up in the SAM E70 to
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* use the button.
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*/
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#define BUTTON_SW0 0
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#define NUM_BUTTONS 1
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#define BUTTON_SW0_BIT (1 << BUTTON_SW0)
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/* PIO Disambiguation *******************************************************/
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/* Serial Console
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*
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* The SAME70-QMTECH has no on-board RS-232 drivers so it will be necessary
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* to use either the VCOM or an external RS-232 driver.
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* Here are some options.
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*
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* - Arduino Serial Shield: One option is to use an Arduino-compatible
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* serial shield. This will use the RXD and TXD signals available at pins
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* 0 an 1, respectively, of the Arduino "Digital Low" connector. On the
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* SAME70-QMTECH board, this corresponds to UART3:
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*
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* ------ ------ ------- ------- --------
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* Pin on SAME70 Arduino Arduino SAME70
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* J503 PIO Name Pin Function
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* ------ ------ ------- ------- --------
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* 1 PD28 RX0 0 URXD3
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* 2 PD30 TX0 1 UTXD3
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* ------ ------ ------- ------- --------
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*
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* There are alternative pin selections only for UART3 TXD:
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*/
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#define GPIO_UART3_TXD GPIO_UART3_TXD_1
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/* - Arduino Communications. Additional UART/USART connections are available
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* on the Arduino Communications connection J505:
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*
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* ------ ------ ------- ------- --------
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* Pin on SAME70 Arduino Arduino SAME70
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* J503 PIO Name Pin Function
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* ------ ------ ------- ------- --------
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* 3 PD18 RX1 0 URXD4
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* 4 PD19 TX1 0 UTXD4
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* 5 PD15 RX2 0 RXD2
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* 6 PD16 TX2 0 TXD2
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* 7 PB0 RX3 0 RXD0
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* 8 PB1 TX3 1 TXD0
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* ------ ------ ------- ------- --------
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*
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* There are alternative pin selections only for UART4 TXD:
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*/
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#define GPIO_UART4_TXD GPIO_UART4_TXD_1
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/* - SAMV7-XULT EXTn connectors. USART pins are also available the EXTn
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* connectors. The following are labelled in the User Guide for USART
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* functionality:
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*
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* ---- -------- ------ --------
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* EXT1 EXTI1 SAME70 SAME70
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* Pin Name PIO Function
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* ---- -------- ------ --------
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* 13 USART_RX PB00 RXD0
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* 14 USART_TX PB01 TXD0
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*
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* ---- -------- ------ --------
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* EXT2 EXTI2 SAME70 SAME70
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* Pin Name PIO Function
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* ---- -------- ------ --------
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* 13 USART_RX PA21 RXD1
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* 14 USART_TX PB04 TXD1
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*
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* There are no alternative pin selections for USART0 or USART1.
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*/
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/* - VCOM. The Virtual Com Port gateway is available on USART1:
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*
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* ------ --------
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* SAME70 SAME70
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* PIO Function
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* ------ --------
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* PB04 TXD1
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* PA21 RXD1
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* ------ --------
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*
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* There are no alternative pin selections for USART1.
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*/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions Definitions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_lcdclear
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*
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* Description:
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* This is a non-standard LCD interface just for the SAM4e-EK board.
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* Because of the various rotations, clearing the display in the normal
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* way by writing a sequences of runs that covers the entire display can
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* be very slow. Here the display is cleared by simply setting all GRAM
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* memory to the specified color.
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*
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****************************************************************************/
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void sam_lcdclear(uint16_t color);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_ARM_SAMV7_SAME70_QMTECH_INCLUDE_BOARD_H */
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