Don't include the build timestamp into final binary when the symbol
CONFIG_LIBC_UNAME_DISABLE_TIMESTAMP is defined.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
./helloxx_main.cxx:29:10: fatal error: cxxabi.h: No such file or directory
29 | #include <cxxabi.h>
| ^~~~~~~~~~
CONFIG_LIBCXXABI is turned on, but the library include is not linked to nuttx/include, causing the compilation to fail.
Signed-off-by: wangmingrong <wangmingrong@xiaomi.com>
This fixes calls like memmem("hello", 5, "lo", 2);
Also zero-length needle is deemed to exist at beginning of haystack.
This behavior matches memmem() on Linux, FreeBSD, NetBSD and OpenBSD.
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
The maximum startup parameters have been checked accordingly in nxtask_setup_stackargs(),
let us save argument counter to avoid limit check.
Signed-off-by: chao an <anchao@lixiang.com>
aggresive optimisation can replace occurrences of sinl() and cosl() with
sincosl(), but sincosl() is missing in newlib which causes error. So let's
use custom implementation here.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Inclusion of mach/mach_time.h by libcxx/src/chrono.cpp breaks
the build on latest MACOS dues to https://forums.developer.apple.com/forums/thread/746737
The interface from mach/mach_time.h is not referenced in chrono.cpp
so it is safe to remove it
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
I recently imported NuttX version 6.0 (and nsh) into a Microchip
Studio project [1] on Windows to figure out what was going wrong with
the avr32dev1 build. I also briefly checked NuttX version 10.
I worked with the assumption that the avr32 (avr32dev1) specific
changes to the codebase were minimal across NuttX releases.
For the initial proof of concept I used Microchip Studio version 7.0
(with the recent Microchip's ASF updates). I use avr32-gcc (4.4.7)
hosted here [2] for building NuttX for avr32dev1 on GNU/Linux.
Even with the Microchip Studio project, I had initial debug problems
with just stepping through the code a line at a time. I had to bring
in crt0, a trampoline stub and the linker file from one of my older
projects to really build on the suspicion I had with the linker file.
Perhaps an older version of avr32-gcc did something differently. I am
not sure about this. I used avr32-objdump to see the output sections
of the generated elf file. I just had to tweak the linker script to
ensure correct linking of the sections.
With those changes, I was able to inspect the UART sections within
NuttX Microchip Studio project.
Second important change: the transmit pin: I had to reassign the pin
to see the nsh console.
These are the currently assigned UART pins:
RX: PA_24 -> Physical IC pin 59
TX: PB_02 -> Physical IC pin 24
For the avr32dev1 board, they are pins: J1 (berg pin 28) and J2 (berg
pin 10).
In addition, the PR fixes silly compilation problems with avr32dev1.
I have tested the nsh build with my avr32dev1 boards. I used Atmel ICE
to program one of them (flash at 0x80000000) and dfu-programmer to
test my other board (flash at 0x80002000). The other RS-232 parameters
are the same as they were.
References:
[1]: https://github.com/ramangopalan/nuttx_avr32dev1
[2]: https://github.com/ramangopalan/avr32-gnu-toolchain-linux_x86_64
It seems libcxx needs C++20 from 12.0.0 to 17.0.6: 3b625060fc
But we're setting CMAKE_CXX_STANDARD to 17, errors on my side:
nuttx/libs/libxx/libcxx/src/include/to_chars_floating_point.h:122:46: error: ‘bit_cast’ is not a member of ‘std’
122 | const _Uint_type _Uint_value = _VSTD::bit_cast<_Uint_type>(_Value);
| ^~~~~~~~
nuttx/libs/libxx/libcxx/src/memory_resource_init_helper.h:2:8: error: ‘constinit’ does not name a type
2 | static constinit ResourceInitHelper res_init _LIBCPP_INIT_PRIORITY_MAX;
| ^~~~~~~~~
nuttx/libs/libxx/libcxx/src/memory_resource_init_helper.h:2:8: note: C++20 ‘constinit’ only available with ‘-std=c++20’ or ‘-std=gnu++20’
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
The lowest bit of the thumb instruction is 1 by default, which is used to distinguish arm instructions and thumb instructions.
Fixed the problem of misalignment of symbol table when performing binary search
In arm, the lowest bit of the instruction is 1, which is a thumb instruction, and 0, which is an arm instruction.
The nm command was used in mkallsym.sh before, and the result it will return will set the lowest bit of the thumb instruction to 0. There will be a one-byte deviation during binary search, so mkallsyms.py will also set the lowest bit to 0 according to the previous format.
```sh
arm-none-eabi-nm -Cn nuttx | grep hello
0801c384 T hello_main
arm-none-eabi-objdump nuttx -t |grep hello
0801c384 g F .text 0000004c hello_main
arm-none-eabi-readelf nuttx -s |grep hello
4558: 0801c385 76 FUNC GLOBAL DEFAULT 1 hello_main
```
However, in the following case, when you need to find the function address according to the symbol name and execute the corresponding function, the lowest address obtained is 0. It will follow the arm instruction, causing an exception.
```c
void sym_test(void)
{
printf("call sym_test\n");
}
int main(int argc, FAR char *argv[])
{
FAR void *addr = sym_test;
printf("sym_test:%p %pS\n",addr, addr);
printf("sym_test - 1: %pS\n", (char *)addr - 1);
printf("sym_test + 1: %pS\n", (char *)addr + 1);
size_t size;
void (*func)(void);
const struct symtab_s *sym = allsyms_findbyname("sym_test", &size);
printf("sym_test:%p %pS\n",sym, sym);
func = sym->sym_value;
func();
return 0;
}
```
Therefore, you need to change mkallsyms.py back to the correct result and correct the binary search.
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
This tries to mirror the following change.
```
commit c260fee516
Author: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Date: Tue Aug 31 14:47:13 2021 -0300
libs/libxx: Enforce RTTI for building libcxxabi
It is okay for the application to be built without RTTI (-fno-rrti), but
libcxxabi requires RTTI at least for the library.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
```
the patch has been removed in the following change.
```
commit 4f90a6140c
Author: Stuart Ianna <stuart.ianna@motec.com.au>
Date: Mon Jan 23 09:08:00 2023 +1100
libcxx: Remove exiting patches and update libcxx version to 15.0.7
- Add __config_site for NuttX.
In libcxx 12.0.0. CMake concatenated __config_site with _config,
which enabled NuttX to build without its inclusion. In 15.0.7, this
file is configured by CMake and included explicitly in __config.
- Add additional include directories.
- Mute always_inline warning.
- Make the download of libcxx/libcxxabi configurable
```
As pointed out in #11322 there is a hardware design issue in RISC-V that
affects RV64 relocations. The problem is with how address bits are loaded
into registers via lui / auipc and sign extension.
If the hi20 relocation value happens to have its 32-bit sign bit set, i.e.
value is 0x80000000 (but not negative! i.e. negative in 64-bit format) the
relocation will fail, as the address is erroneously sign extended:
0x00000000_80000000 becomes 0xffffffff_80000000 which is not correct.
Also, make sure the correct opcode is used with PCREL_HI20, it expects
AUIPC (not LUI). The C compiler will never emit such code but when hand-
writing assembly code this can happen.
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:
label:
auipc a0, %pcrel_hi(symbol) // R_RISCV_PCREL_HI20
load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S
With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).
However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.
The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.
[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
we can use uart to debug nuttx,like debugger:
1. read/write memory
2. Use watchpoint,breakpoint,single step.
use up_debugpoint api
3. Ctrl+c to stop, continue, or single step.
hold uart send and receive
4. register a panic event, when crash or assert/panic, we use uart to
debug.
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Add registration function instrumentation API,
which can achieve instrumentation of entering and
exiting functions through the compiler's functionality.
We can use CONFIG_ARCH_INSTRUMENT_ALL to add instrumentation for all
source, or add '-finstrument-functions' to CFLAGS for Part of the
source.
Notice:
1. use CONFIG_ARCH_INSTRUMENT_ALL must mark _start or entry noinstrument_function,
becuase bss not set.
2. Make sure your callbacks are not instrumented recursively.
use instrument_register to register entry function and exit function.
They will be called by the instrumented function
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Binary nibble to/from ascii hex conversion was buggy on both
lib_slcdencode and lib_slcddecode libraries.
This bug caused the slcd library to fail to decode 5-byte sequence command
which have 'count' argument value bigger than 0x9.
Signed-off-by: Federico Braghiroli <federico.braghiroli@gmail.com>
shizhenghui