Commit Graph

11620 Commits

Author SHA1 Message Date
Frank Benkert 04223a9618 SAMV7: USBHS: Remove disabling of whole usb on suspend
This fix removes the disabling of the whole USB peripheral on suspend
interrupt. Its enough to freeze the clock instead.

When disabling the whole peripheral, the next wakeup-interrupt comes
up with an disabled clocking. The unfreeze clock has no effect, because
the master clock is disabled. This makes all registers, including the
IDR unwriteable and the IRQ falls in an endless loop blocking the whole
system.

Furthermore the disabling of the peripheral clock prevents hotplugging
or reconnecting the USB.
2016-05-25 07:20:48 -06:00
Gregory Nutt 317bf064a8 i.MX6: Clean up some initializers 2016-05-24 07:44:36 -06:00
Alexander Vasiljev ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Gregory Nutt 3a8ff78f87 Restore PR. I have no idea where it went. 2016-05-23 17:45:15 -06:00
Gregory Nutt e929066042 Fix an error in the last commit 2016-05-23 17:11:36 -06:00
David Sidrane c41e6d823a Add the up_systemreset interface to the samv7 arch. The approach is slightly different in that: 1) It enables ARCH_HAVE_RESET and allows the user to set if, and for how long, to drive External nRST signal. It also does not contain a default board_reset, as that really should be done in the config's src if CONFIG_BOARDCTL_RESET is defined. 2016-05-23 17:05:02 -06:00
David Sidrane fca329945b This patch ensures that the TWIHS (i2c) hw get's its clock set when the sequence of
sam_i2cbus_initialize
sam_i2cbus_uninitialize
sam_i2cbus_initialize

Or twi_reset is called.

I found this a while back in the stm32 family, so there may be more arch-es with this sort of bug. I suppose any driver that has the notion of "do not set the freq if it is already set" could be suspect.
2016-05-23 13:38:34 -06:00
Alexander Vasiljev b43fcd6f99 LPC43xx: Add AES support. 2016-05-23 08:03:32 -06:00
Gregory Nutt 80d0b2736e Reorder some logic: (1) set initial CPU IDLE task regsters AFTER allocating stack, (2) invalidate cache in CPU start-up BEFORE handling first interrupt. 2016-05-22 15:01:49 -06:00
Steve a75c48c183 Fix for a minor typo that I introduced somewhere along the way during my testing. This makes the bridge code actually compile… 2016-05-21 17:09:50 -06:00
Gregory Nutt e47714322e Merged in K-man23/nuttx/stm32f411e-disco (pull request #25)
Add basic configuration for stm32f411e-disco board with STM32F411VE chip
2016-05-20 17:54:07 -06:00
Konstantin Berezenko a2253cdd3e Add basic configuration for stm32f411e-disco board with STM32F411VE chip 2016-05-20 16:38:25 -07:00
Steve bd3ef36eda SUMMARY
-------
   This patch enhances networking support for the simulation under Linux.
   Includes updated support for Linux TUN/TAP, and the addition of support for
   Linux bridge devices.

CHANGES
-------
   o Check to see if the d_txavail callback is present before calling it in
     the arp send code.  This prevents a segfault when simulating the telnetd
     daemon with arp send enabled.

   o Adjust the simulation's netdriver_loop() so it will detect and respond to
     ARP requests.

   o Do not attempt to take the tap device's hardware address for use by the
     simulation.  That hardware address belongs to the host end of the link,
     not the simulation end.  Generate a randomized MAC address instead.

   o Do not assign an IP address to the interface on the host side of the TAP
     link.

   + Provide two modes: "host route" and "bridge".

   + In host route mode, maintain a host route that points any traffic for the
     simulation's IP address to the tap device.  In this mode, so long as the
     simulation's IP is a free address in the same subnet as the host, no
     additional configuration will be required to talk to it from the host.
     Note that address changes are handled automatically if they follow the
     rule of if-down/set-address/if-up, which everything seems to.

   + In bridge mode, add the tap device to the specified bridge instance.  See
     configs/sim/NETWORK-LINUX.txt for information and usage examples.  This
     enables much more flexible configurations (with fewer headaches), such as
     running multiple simulations on a single host, all of which can access
     the network the host is connected to.

   o Refresh configurations in configs/sim where CONFIG_NET=y.  They default
     to "host route" mode.

   o Add configs/sim/NETWORK-LINUX.txt

CAVEATS
-------
   - The MAC address generation code is extremely simplistic, and does not
     check for potential conflicts on the network.  Probably not an issue, but
     something to be aware of.

   - I was careful to leave it in a state where Cygwin/pcap should still work,
     but I don't have a Windows environment to test in.  This should be
     checked.

   - I don't know if this was ever intended to work with OS X.  I didn't even
     try to test it there.

NOTES
-----
   - Was able to get telnetd working and simulate nsh over telnet, but only so
     long as listen backlogs were disabled.

     There appears to be a bug in the backlog code where sockets are being
     returned in SYN_RCVD state instead of waiting until they're ESTABLISHED;
     if you perform an immediate send after accepting the connection, it will
     confuse the stack and the send will hang; additionally, the connection
     will never reach ESTABLISHED state.

     Can be worked around by adding a sleep(1) after the accept in telnetd.  I
     don't have the necessary knowledge of the IP stack to know what the
     correct fix is.
2016-05-20 17:36:14 -06:00
Gregory Nutt 356692d70e SMP: Need to enable FPU on other CPUs as well 2016-05-20 13:35:58 -06:00
Gregory Nutt 07acd5327a SMP: Clean CPU0 D-Cache before starting new CPU; Invalidate D-Cache when new CPU started. 2016-05-20 12:39:02 -06:00
David Sidrane 916153fb75 Fix build if the config is not updated 2016-05-19 12:44:58 -10:00
Gregory Nutt e27e87a957 Backing out part of last commit 2016-05-19 15:46:07 -06:00
David Sidrane 8fac871cc9 Adds a JTAG config and ERASE config to Kconfig to set the CCFG_SYSIO SYSIO Pins
• SYSIO4: PB4 or TDI Assignment
0: TDI function selected.
1: PB4 function selected.
• SYSIO5: PB5 or TDO/TRACESWO Assignment
0: TDO/TRACESWO function selected.
1: PB5 function selected.
• SYSIO6: PB6 or TMS/SWDIO Assignment
0: TMS/SWDIO function selected.
1: PB6 function selected.
• SYSIO7: PB7 or TCK/SWCLK Assignment
0: TCK/SWCLK function selected.
1: PB7 function selected.
• SYSIO12: PB12 or ERASE Assignment
0: ERASE function selected.
1: PB12 function selected.

The thing I did not add is warning or compilation failure, (to save the next guy the hassle), at ALL the driver points that uses the these pins.

I did remove this

  /* To use the USART1 as an USART, the SYSIO Pin4 must be bound to PB4
   * instead of TDI
   */

  uint32_t sysioreg = getreg32(SAM_MATRIX_CCFG_SYSIO);
  sysioreg |= MATRIX_CCFG_SYSIO_SYSIO4;
  putreg32(sysioreg, SAM_MATRIX_CCFG_SYSIO);

in sam_lowputc.c in favor of an #error - because the default is an input TDI and driving it blindly to an output TXD1, would be a contention.
2016-05-19 14:33:54 -06:00
Gregory Nutt 7f7d4e664c Completely trivial changes from review of last PR 2016-05-19 14:09:00 -06:00
Sebastien Lorquet ef66f641e9 small fix left from stm32 2016-05-19 21:57:59 +02:00
Sebastien Lorquet 6642898ee4 Merge branch 'master' into can 2016-05-19 21:49:31 +02:00
Sebastien Lorquet 8aae953f67 CAN support for STM32L4 2016-05-19 19:13:04 +02:00
Gregory Nutt c364faeefc SAM WDT: Rename up_wdginitialize() functions to something more appropriate for the internal OS interface. 2016-05-18 19:47:48 -06:00
Gregory Nutt 5d574549bd stm32f103-minimum: Add schematic; remove unused watchdog driver logic 2016-05-18 15:37:42 -06:00
Gregory Nutt f454b38d6e ARMv7-A SMP: Allow CONFIG_SMP_NCPUS=1 for testing purposes 2016-05-18 09:17:02 -06:00
Gregory Nutt 72de45b7cf Merged in david_s5/nuttx/upstream_to_greg (pull request #21)
Fixed Break changes needed CONFIG_SERIAL_TERMIOS to build
2016-05-17 18:09:23 -06:00
David Sidrane f444f061d6 Fixed Break changes needed CONFIG_SERIAL_TERMIOS to build 2016-05-17 14:04:51 -10:00
Gregory Nutt 5fc619eb1b Changes from review of last PR 2016-05-17 17:39:27 -06:00
Gregory Nutt 4aeb06a79d Merged in david_s5/nuttx/upstream_to_greg (pull request #20)
Upstream_to_greg
2016-05-17 17:30:45 -06:00
David Sidrane bef5552eba Support BSD compatible breaks on stm32fl4 U[S]ART 2016-05-17 13:09:34 -10:00
David Sidrane 3ffe7c378f Support BSD compatible breaks on stm32f7 U[S]ART 2016-05-17 13:09:34 -10:00
David Sidrane b11f49e7f1 Support BSD compatible breaks on stm32 U[S]ART 2016-05-17 13:09:34 -10:00
David Sidrane 55d8b0e277 Use the correct register and bit to send an STM32 non-bsd compatible break 2016-05-17 07:55:33 -10:00
Gregory Nutt fb484a581f All GCC final arch/*/src/Makefiles: Allow --start-group and --end-group to be redefined for the case where GCC is used to link (instead of LD). Suggested by Paul Alexander Patience. 2016-05-17 10:43:15 -06:00
Gregory Nutt 0fe64839db i.MX6: Fix comparison values in system timer setup. Clock was running 3x too fast. 2016-05-17 10:08:06 -06:00
Gregory Nutt 4c08492c0f i.MX6: Fix a bit setting in the timer configuration 2016-05-17 07:21:18 -06:00
Gregory Nutt e6728bac29 Cortex-A9 GIC: Add an interface to set interrupt edge/level trigger 2016-05-16 14:42:55 -06:00
Gregory Nutt 4feeb0c2b4 Cortex-A9 GIC: Some fixes that I don't fully understand but do indeed give me serial interrupts 2016-05-16 12:50:35 -06:00
Gregory Nutt a0cdbcb58f Update README 2016-05-16 08:44:18 -06:00
Gregory Nutt a3f3cc12c0 Update some comments; Fix grammatic error in ChangeLog. 2016-05-13 17:36:08 -06:00
Gregory Nutt faca2fb1e7 ARMv7-A/i.MX6: Add logic to handle allocation of CPU IDLE thread stacks more efficiently 2016-05-13 11:39:42 -06:00
Gregory Nutt d14d84c1a6 ARMv7M/i.MX6: Implement CPUn n=1,2,3 startup logic 2016-05-13 09:11:55 -06:00
Gregory Nutt e5388ad127 i.MX6: Need to set VBAR register for each CPU 2016-05-12 15:32:53 -06:00
Gregory Nutt 70782b0f14 ARMv7-A i.MX6: More SMP logic. Still untested. 2016-05-12 15:04:46 -06:00
Gregory Nutt 99e695398c Rename up_boot to arm_boot 2016-05-12 13:42:49 -06:00
Gregory Nutt ba4ae6fdc4 Cosmetic fixes to last commit 2016-05-12 13:42:48 -06:00
David Sidrane 8a4e185c84 Kconfig edited online with Bitbucket 2016-05-12 18:50:43 +00:00
Gregory Nutt 7887b2d164 i.MX6: Add SRC register definition header file 2016-05-12 12:23:07 -06:00
Gregory Nutt c00e3e55dc Fix several places in DMA logic where a spurious semicolon causes bad conditional logic 2016-05-11 17:42:59 -06:00
Gregory Nutt f64f7407ba SAMDL DMAC: Fix several places in DMA logic where a spurious semicolon causes bad conditional logic 2016-05-11 17:30:04 -06:00