Xiang Xiao
1b5341f6c0
boards/bl602: Fix uart_nx.c:419: undefined reference to `uart_bth4_register'
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-01 05:01:21 -05:00
xiewenxiang
5fd3eca9c9
riscv/esp32c3: Support BLE sleep mode
2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587
riscv/esp32c3: Add Wi-Fi and BLE coexist
2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5
riscv/esp32c3: Add esp32c3 BLE driver
2021-06-28 23:14:30 -05:00
Virus.V
8452c571ec
risc-v/bl602: BLE firmware adapts to the new framework
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Virus.V
cd50650583
risc-v/bl602: Support AP and STA as independent network interface device
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Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Abdelatif Guettouche
11ed8575cd
boards/rsic-v/esp32c3: Use the common gnu-elf.ld file from binfmt/libelf
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instead of keeping the same file for each board.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 08:04:14 -05:00
Abdelatif Guettouche
eb403bc996
boards/riscv/esp32c3: Rename the iram_0_2 segment to irom_0_0 to avoid
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confusions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 07:00:51 -05:00
Abdelatif Guettouche
60da4317b9
arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
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consistency.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Liu Han
2dd081ed7d
risc-v/esp32c3: Support ESP32-C3 SHA accelerator
2021-06-21 02:41:53 -05:00
Abdelatif Guettouche
af5e0c620f
Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Abdelatif Guettouche
f54804bafc
arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
965a39a76d
boards/risc-v/esp32c3-devkit: Include "config.h" in esp32c3_boot.c
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
bd0e03fecf
boards/risc-v/esp32c3-devkit/esp32c3.ld: Add the RTC BSS section for
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completeness.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
61f7bc6e2a
boards/risc-v/esp32c3-devkit/scripts: Drop the "iram" in the name of the RTC
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section.
The RTC region is accessed by both I and D buses. The old name of
`rtc_iram_seg` is a bit confusing.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Liu Han
04c805207a
risc-v/esp32c3: Support ESP32-C3 efuse
2021-06-16 09:35:09 -03:00
Liu Han
8eaaf6d462
risc-v/esp32c3: Support ESP32-C3 RSA accelerator
2021-06-14 15:03:11 -03:00
Eero Nurkkala
1bce864ef7
mpfs: add i2c driver
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This adds mpfs i2c driver.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00
Eero Nurkkala
fad34e04c4
mpfs: add spi driver
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This adds the SPI driver for the MPFS Icicle board.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 09:10:03 -05:00
Chen Wen
dbf9c87a42
risc-v/esp32c3: Support ESP32-C3 RTC driver
2021-06-10 09:33:04 -03:00
Xiang Xiao
5b2a17b892
Include assert.h in necessary place
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-08 13:06:08 -07:00
unixjet
68f19a6290
risc-v/rv32m1: Basic port to rv32m1 ri5cy
2021-06-05 17:25:57 -03:00
Gustavo Henrique Nihei
0b3c2c7603
spi: Refactor SPI Slave interface prefix to sync with I2C Slave
2021-06-05 04:50:34 -07:00
Abdelatif Guettouche
f00deae9ac
boards/esp32c3-devkit: Add a defconfig to test the shared library
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example.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
dd4962b2f8
boards/esp32c3-devkit: Add the necessary flags for loadable modules and
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a module defconfig to test the "module" example.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
3b7ae20843
boards/risc-v/esp32c3-devkit: Add an ELF defconfig and the necessary ELF
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flags and linker script to support that.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Xiang Xiao
2e54df0f35
Don't include assert.h from public header file
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:36:03 -07:00
YAMAMOTO Takashi
c20ed229b1
refresh configs
2021-06-03 10:05:33 -05:00
Xiang Xiao
d7f96003cf
Don't include debug.h from public header file
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-01 06:42:02 +09:00
Gustavo Henrique Nihei
8a41d849df
drivers/spi: Change prefix to a more intuitive "spislave"
2021-05-31 07:54:08 -07:00
Gustavo Henrique Nihei
8914646c27
board/esp32c3-devkit: Add support for SPI Slave chardev driver
2021-05-31 12:54:15 +01:00
Virus.V
c6317650f9
risc-v/bl602: Add RTC support
2021-05-26 20:03:19 -03:00
Dong Heng
73dcbac09d
riscv/esp32c3: Add ESP32-C3 AES driver
2021-05-25 11:02:59 -03:00
Govind Singh
1e4490f127
boards: maix-bit: Update README.txt with updated clone path
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Update apps clone path to avoid below error seen due to
expected relative path.
tools/Makefile.unix:329: recipe for target 'dirlinks' failed
make: *** [dirlinks] Error 2
ERROR: failed to refresh
Signed-off-by: Govind Singh <govind.sk85@gmail.com>
2021-05-25 01:37:28 -05:00
Janne Rosberg
d6205642ab
add support for PolarFire SoC and icicle board
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Co-authored-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-05-24 22:55:44 -05:00
Dong Heng
76df958e34
riscv/esp32c3: Support SPI Flash encryption read/write
2021-05-23 08:37:25 -03:00
Huang Qi
f4a0b7aedd
libc: Call pthread_exit in user-space by up_pthread_exit
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Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.
* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-05-21 22:46:52 -06:00
Huang Qi
103925b2b7
boards/risc-v/c906: Remove unneeded pthread_start
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-05-21 22:46:52 -06:00
Gregory Nutt
bb9b58bdde
libc: Move pthread_create to user space
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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: I5c447d94077debc79158686935f288e4c8e51e01
2021-05-21 22:46:52 -06:00
chenwen
9a99d813fa
risc-v/esp32c3: Support ESP32-C3 auto-sleep
2021-05-19 07:00:40 -03:00
Dong Heng
f12de4f7d9
riscv/esp32c3: Add ESP32-C3 ADC driver
2021-05-18 09:20:46 -03:00
Dong Heng
beed26b6bf
riscv/esp32c3: Add ESP32-C3 LEDC(PWM) driver
2021-05-15 08:38:37 -03:00
Xiang Xiao
11ef8a3201
board: Enable CONFIG_BOARDCTL_ROMDISK
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to fix build break by commit 3156aa7532
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-05-13 10:44:16 -05:00
chenwen
16667930cb
risc-v/esp32c3: Support ESP32-C3 PM standby and sleep
2021-05-12 10:15:06 -03:00
Abdelatif Guettouche
df7bd125f8
boards/risc-v/esp32c3: Convert the README.txt to the new Documentation.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-12 04:40:41 -07:00
Dong Heng
bd8e37bb4b
risc-v/esp32c3: Add ESP32-C3 (G)DMA driver and testing
2021-05-07 16:46:41 -03:00
Gustavo Henrique Nihei
4f08f43a6d
boards/esp32c3-devkit: Increase MAX_TASKS to 16 on nsh/ostest configs
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This fixes the barrier test from ostest application
2021-04-30 17:55:30 +01:00
Dong Heng
fcd5648bca
riscv/esp32c3: Fix SPI Flash driver internal chip data address error
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"g_rom_flashchip" is not in fixed address between all ESP32-C3's different versions.
2021-04-28 09:58:16 -05:00
Gustavo Henrique Nihei
66a15a6f83
risc-v/esp32c3: Fix wrong references to ESP32
2021-04-28 15:41:30 +01:00
Gustavo Henrique Nihei
ba23526e39
boards/esp32c3-devkit: Allocate .noinit in a dedicated section
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Previously it was being allocated into .bss section after the _ebss
address. Although functional, this is not intuitive.
2021-04-28 15:40:49 +01:00