Lok Tep
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1f4ce9e7f9
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LPC43xx: Fix some NVIC priority definitions
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2016-01-25 07:23:28 -06:00 |
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Gregory Nutt
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29136e51cc
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Clean up and review of header files for conformance to standards
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2015-06-12 19:26:01 -06:00 |
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Gregory Nutt
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a8004f9e07
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Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register
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2013-04-16 18:00:59 -06:00 |
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patacongo
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150aa31bc3
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Buildroot now builds armv6-m toolchain; NuTiny configuration now uses buildroot toolchain
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5665 42af7a65-404d-4744-a932-0658087f49c3
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2013-02-23 02:25:53 +00:00 |
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patacongo
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4f2287e5d7
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Add Nuvoton chip selection logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5656 42af7a65-404d-4744-a932-0658087f49c3
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2013-02-16 18:13:12 +00:00 |
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patacongo
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8e11e189f4
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First cut at support for Cortex-M0
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5655 42af7a65-404d-4744-a932-0658087f49c3
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2013-02-16 16:32:19 +00:00 |