Commit Graph

495 Commits

Author SHA1 Message Date
Gwenhael Goavec-Merou 02535be36a STM32F410. Add support for STM32Fr10. STM32F410 is a version of STM32F4 with 32 KB of RAM and 62 or 128 KB of flash. 2017-05-13 08:40:09 -06:00
Gregory Nutt 0de294a586 Fix lots of occurrences of 'the the', 'the there', 'the these', 'the then', 'the they. 2017-05-11 13:35:56 -06:00
Juha Niskanen 35883ff9ae Merged in juniskane/nuttx_stm32l4/l4dev (pull request #347)
STM32L4: add support for many new MCUs from STM32L4X3XX product line and Nucleo-L452 board

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-05-05 15:31:07 +00:00
David Sidrane 2171523f50 Kinetis:Add TPM to K66 chip 2017-05-05 07:12:52 -06:00
Juha Niskanen ae22eb224a STM32L4: changes needed for STM32L452 and Nucleo-L452RE board
GPIO and UART seem similar across STMicro product matrix,
so renamed files accordingly. RCC is cloned just in case,
while conflicting differences there seem to be very minor.
2017-05-04 15:23:38 +03:00
Juha Niskanen a59b7bc932 STM32L4: add GPIO_PORTI definition
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2017-05-02 07:41:14 -06:00
Juha Niskanen b4d2651ca9 STM32L4: stm32l4_i2c: add I2C4 code 2017-04-28 08:09:16 -06:00
Juha Niskanen f1b71e3ae7 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:26:32 -06:00
Juha Niskanen 8a6662c957 TM32L4: Add some defines for the new peripherals in STM32L496 parts 2017-04-27 07:25:20 -06:00
Juha Niskanen 06e4c4aedd STM32L4: add support for the STM32L496XX family 2017-04-25 08:47:50 -06:00
Juha Niskanen (Haltian) c04c49dac0 Add support for the STM32F09X family. 2017-04-21 08:23:25 -06:00
Gregory Nutt 73c7f05a3c Cosmetic changes to spacing and comments. 2017-04-20 14:08:08 -06:00
Gregory Nutt d0ec395c42 Correct some spacing and some unused definition in some irq.h header files. 2017-04-20 12:39:21 -06:00
Juha Niskanen 9d0ecedf7d Add support for STM32L152CC, STM32L152RC and STM32L152VC. Update some bits and comments for other STM32L1 parts in chip.h 2017-04-20 06:30:26 -06:00
Gregory Nutt 27e212a291 Nucleo-F072RB: Various fixes to get the first clean build. 2017-04-18 10:37:05 -06:00
Gregory Nutt 8b157b034d STM32F0: Fixes to get STM32F0-Discovery build again after changes to support the STM32F07x 2017-04-17 17:13:32 -06:00
Gregory Nutt 2c01aaad59 STM32F0: Add basic support for STM32F07x family 2017-04-17 16:54:07 -06:00
Gregory Nutt c910334ced Make sure that Alan is listed as author in new files. 2017-04-14 08:34:37 -06:00
Alan Carvalho de Assis c3e0ec369f Add basic support for STM32F0 2017-04-14 08:34:36 -06:00
Juha Niskanen e320e5c100 STM32: add STM32L162VE to chip.h 2017-04-03 07:59:11 -06:00
David S. Alessio 7f2c4c4274 XMC4xxx: Add FPU support 2017-03-22 12:04:32 -06:00
Gregory Nutt 805a4f65e9 XMC4xxx: Fixes to HIB domain setup, GPIO pin configuration. 2017-03-21 09:31:44 -06:00
Gregory Nutt 886dadae0a XMC4xxx: Minor updates to naming and comments 2017-03-20 18:10:23 -06:00
Gregory Nutt b9e29d1083 XMC4xxx: Clean up memory map 2017-03-20 17:08:09 -06:00
Gregory Nutt 4ba091933e XMC4xxx: Fix for early bringup problems 2017-03-20 16:31:35 -06:00
Gregory Nutt 5c0be816a5 XMC4xxx: Add commin USIC support logic for use in all USIC configurations. 2017-03-19 12:48:37 -06:00
Gregory Nutt 5693f26a5e XMC4xx: Fix several early compilation problems. 2017-03-16 11:30:02 -06:00
Gregory Nutt 2430049e3b arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete. 2017-03-14 13:04:09 -06:00
ahb 67c86e5aa9 add LPC4337FET256 2017-03-09 10:30:28 +01:00
Gregory Nutt ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
Gregory Nutt 2e0ffc0ea3 Update some comments. 2017-02-26 09:15:57 -06:00
raiden00pl 3175b74428 Add basic support for the STM32F334 2017-02-26 12:39:44 +01:00
David Sidrane 61b10c5e58 Kinetis:Add LPUART to K66 chip
Add KINETIS_NLPUART setting it to 1 and adjust KINETIS_NUART
  to removed UART5 as the K66 dioes not have UART5
2017-02-25 07:02:56 -10:00
David Sidrane 1ba6eadcec Kinetis:Include the PMC features 2017-02-22 10:42:52 -10:00
David Sidrane 8525c266a1 Created a kinetis PMC versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
     K series family of parts.

     This added versioning and configuration features for the
     Kinetis PMC IP block.

     It is envisioned that in the long term as a chip is added.
     The author of the new chip definitions will either find
     the exact configuration in an existing chip define and
     add the new chip to it Or add the PMC fature configuration
     #defines to the chip ifdef list in
     arch/arm/include/kinetis/kinetis_pmc.h  In either case the
     author should mark it as "Verified to Document Number:"
     taken from the reference manual.

     The version KINETIS_PMC_VERSION_UKN has been applied to
     most all the SoCs in the kinetis arch prior to this commit.

     The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
     CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
     Verified PMC configurations.
2017-02-22 10:42:52 -10:00
David Sidrane 5b550a37eb Kinetis:Include the SIM features 2017-02-22 10:42:52 -10:00
David Sidrane d74f16ecb9 Kinetis:Created a kinetis SIM versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis SIM IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing chip define and
   add the new chip to it Or add the SIM feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_sim.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_SIM_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified SIM configurations.
2017-02-22 10:42:52 -10:00
David Sidrane 14bdf3af22 Kinetis:Fixed Typo in kinetis_mcg header 2017-02-22 10:42:52 -10:00
Gregory Nutt e803e2c3f4 Costmetic changes from review of last PR. 2017-02-07 17:16:56 -06:00
David Sidrane ff056cf9bd arch/arm/include/kinetis/kinetis_mcg.h 2017-02-07 12:38:28 -10:00
David Sidrane 2216ed52a9 Kinetis chip Adding K66 and inlcuding MCG versioning
This includes arch/arm/include/kinetis/kinetis_mcg.h
  to bring in the MCG versioning and defines the KINETIS_K66
  family for the added SoCs:

   --------------- ------- --- ------- ------- ------ ------ ------ -----
   PART NUMBER     CPU     PIN PACKAGE  TOTAL  PROGRAM EEPROM SRAM  GPIO
                   FREQ    CNT          FLASH  FLASH
   --------------- ------- --- ------- ------- ------ ------ ------ -----
   MK66FN2M0VMD18  180 MHz 144 MAPBGA   2   MB    —    — KB  260 KB 100
   MK66FX1M0VMD18  180 MHz 144 MAPBGA  1.25 MB  1 MB   4 KB  256 KB 100
   MK66FN2M0VLQ18  180 MHz 144 LQFP     2   MB    —    — KB  260 KB 100
   MK66FX1M0VLQ18  180 MHz 144 LQFP    1.25 MB  1 MB   4 KB  256 KB 100
2017-02-07 12:38:28 -10:00
David Sidrane ec567371b6 Created a kinetis MCG versioning scheme pulled in by Kinetis chip.h
The motvations is to version the IP blocks of the Kinetis
   K series family of parts.

   This added versioning and configuration features for the
   Kinetis MCG IP block.

   It is envisioned that in the long term as a chip is added.
   The author of the new chip definitions will either find
   the exact configuration in an existing  chip define and
   add the new chip to it Or add the MCG feature configuration
   #defines to the chip ifdef list in
   arch/arm/include/kinetis/kinetis_mcg.h  In either case the
   author should mark it as "Verified to Document Number:"
   taken from the reference manual.

   The version KINETIS_MCG_VERSION_UKN has been applied to
   most all the SoCs in the kinetis arch prior to this commit.

   The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
   All K64 and K66 which not have Verified MCG configurations.
2017-02-07 12:38:28 -10:00
Gregory Nutt 9395704192 Kinetis, not Kinetics. 2017-02-07 08:20:52 -06:00
Wolfgang Reißnegger a22dc9b1a8 SAM3/4: Add support for ATSAM4S4C. 2017-01-18 11:56:51 -08:00
Maciej Skrzypek 902c41462d Kinetis: New K60 has no Flex memory 2017-01-13 08:20:48 -06:00
Maciej Skrzypek 4becebe59f Kinetis: Fixed wrong MCG VDIV calculation on new NXP K60 2017-01-13 08:13:21 -06:00
Maciej Skrzypek bc1826da63 Kinetis: Added CHIP_MK60FN1M0VLQ12 chip 2017-01-13 08:10:03 -06:00
Gregory Nutt 12148f0e33 Merged in paulpatience/nuttx/stm32 (pull request #180)
STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs
2016-12-24 20:20:39 -06:00
Gregory Nutt f063e4c5ac Remove Calypso architecture support and support for Calypso SERCOMM driver. 2016-12-13 18:35:52 -06:00
Gregory Nutt 26560cb9e1 i.MX6: Remove non-cached, inter-cpu memory region. Not a useful concept. 2016-12-13 16:59:50 -06:00