Commit Graph

66 Commits

Author SHA1 Message Date
hujun5 cef8c598c7 arm64: Add support for FIQ interrupts
To compile arm64 NuttX, use the following command:
 ./tools/configure.sh -l qemu-armv8a:nsh_fiq
To run,use the following command
 qemu-system-aarch64 -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 16:56:24 -04:00
TaiJu Wu ffba0d15a5 Feature: implement ticket spinlock
test config: ./tools/configure.sh -l qemu-armv8a:nsh_smp

Pass ostest

No matter big-endian or little-endian, ticket spinlock only check the
next and the owner is equal or not.

If they are equal, it means there is a task hold the lock or lock is
free.

Signed-off-by: TaiJu Wu <tjwu1217@gmail.com>

Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2023-10-07 01:38:37 +08:00
ThomasNS a2c806027f fix led panic feature 2023-09-21 00:35:12 +08:00
wangjianyu3 59e5037f90 arch/arm64: Add support for FriendlyElec NanoPi M4
Refs: https://github.com/apache/nuttx/pull/10193
      https://github.com/u-boot/u-boot/tree/v2022.04
      https://wiki.friendlyelec.com/wiki/index.php/NanoPi_M4

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2023-09-17 21:17:06 +08:00
Xiang Xiao 8dbe86084e Remove FAR from source code under 32bit arch and board
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-16 19:12:13 +03:00
liaoao a2ca68aaa7 qemu:fix ci error
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-14 15:19:59 +08:00
simbit18 50e6dcb1e0 Fix nuttx coding style
Correct forming guard names
2023-09-13 22:49:38 +08:00
liaoao a2b9cbffc2 qemu: get reg and irq from devicetree node rather than macro
fdt address is at 0x4000000, so it needs to be reserved at ld script.

Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-12 21:59:26 +08:00
Anner J. Bonilla 987afb1924 pinephone pro: add support for board reset 2023-09-08 01:14:49 +08:00
Alan Carvalho de Assis c27c33e9a9 Run refresh.sh to update all board configs 2023-09-02 14:45:44 +08:00
cuiziwei 4ec7af779d nuttx/boards:init_array.* needs to be executed in order
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program.

I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
2023-08-29 22:54:37 +08:00
liaoao 3da7775543 libfdt: modify makefile
update LIBFDT to LIBC_FDT
update CONFIG_LIBFDT_DTC_VERSION to CONFIG_LIBC_FDT_DTC_VERSION
move dtc source code to fdt/dtc
move version_gen.h from apps/system/fdt to current dir

Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-08-26 17:07:02 +08:00
Anner J. Bonilla 24e45d071e Pinephone Pro port just nsh
Pinephone Pro port just nsh

Status:
booting till GICD / IRQ issue

style cleanups

start to fix style checks

revert offset

whitespaces

revert a64 bringup file

prob last cleanup

more cleanups

remove dts

move changes from a64 hardware specific folders to rk3399

undo common changes (except head.s)

revert gitignore

missing irq.h and rk3399_serial.c need to finish cleaning them up

WIP

add source for load address

make debug print hex again add board include

Pinephone Pro port just nsh

Status:
booting till GICD / IRQ issue

style cleanups

start to fix style checks

revert offset

whitespaces

revert a64 bringup file

prob last cleanup

more cleanups

remove dts

move changes from a64 hardware specific folders to rk3399

undo common changes (except head.s)

revert gitignore

missing irq.h and rk3399_serial.c need to finish cleaning them up

WIP

add source for load address

remove ccache, add board memory map

remove board reset
2023-08-24 11:16:31 +08:00
Masayuki Ishikawa cc906e28e4 boards: Fix QEMU_VIRTIO_MMIO_NUM
Summary:
- I noticed that device discovery for virtio-mmio devices does not
  work without bus=virtio-mmio-bus.x option. Without this option,
  qemu assigns the virtio device into the virtio-mmio space
  in reverse order automatically.
- To fix this issue, we must specify the correct numbers for the
  target machines. (i.e. arm32/64->32, rv32/64->8)

Impact:
- None

Testing:
- Tested with qemu-7.2.4

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-08-22 20:26:10 +08:00
nietingting 4405264008 add citest support for qemu-armv8a and fvp-armv8r
Signed-off-by: nietingting <nietingting@xiaomi.com>
2023-08-22 00:07:46 +08:00
qinwei1 630b5f32a2 arm64: IMX8 MEK board support
Summary

   Support for imx8qm MEK evaluate board

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-08-21 14:23:05 +08:00
chenrun1 fb74c46e4d arm64/gnu:Set arch_* optimizations to be on by default.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-08-19 18:43:08 +08:00
Peter Bee 58f9cf7c04 boards: update README for virtio gpu driver
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2023-08-15 13:32:05 +08:00
Peter Bee 99c2a6ffbe boards: add defconfig for virtio-gpu fb showcase
Usage example:

tools/configure.sh qemu-armv8a:fb
make -j
qemu-system-aarch64 -cpu cortex-a53 \
    -machine virt,virtualization=on,gic-version=3 \
    -chardev stdio,id=con,mux=on -serial chardev:con \
    -global virtio-mmio.force-legacy=false \
    -device virtio-gpu-device,xres=640,yres=480,bus=virtio-mmio-bus.1 \
    -mon chardev=con,mode=readline \
    -kernel ./nuttx

tools/configure.sh rv-virt:fb
make -j
qemu-system-riscv32 -semihosting -M virt -cpu rv32 -smp 8 -bios none -chardev stdio,id=con,mux=on -serial chardev:con -device virtio-gpu-device,xres=640,yres=480,bus=virtio-mmio-bus.1 -mon chardev=con,mode=readline -kernel ./nuttx

tools/configure.sh rv-virt:fb64
make -j
qemu-system-riscv64 -semihosting -M virt -cpu rv64 -smp 8 -bios none -chardev stdio,id=con,mux=on -serial chardev:con -device virtio-gpu-device,xres=640,yres=480,bus=virtio-mmio-bus.1 -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2023-08-11 20:20:11 +08:00
liaoao dffab1e0c6 qemu: add devicetree support for arm64
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-08-11 00:46:50 +08:00
qinwei1 37e69cdeb0 arch/arm64: enable for arm64 virt to choice CPU core
Summary
    Qemu virt board can choice CPU core with boot parameter
and we need to add Konfig option for choice
    the change do this

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-08-10 20:48:19 +08:00
qinwei1 d8e1022b6f arm64: add hostfs support
Sumary
   add hostfs support for arm64, it's a copy
from arm32.

Note:
   it's not support for opendir and readdir, command
like ls will not work.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-08-10 17:58:34 +08:00
wangbowen6 9aa57b6c53 virtio: add virtio framework in NuttX
1. virtio devics/drivers match and probe/remote mechanism;
2. virtio mmio transport layer based on OpenAmp (Compatible with both
   virtio mmio version 1 and 2);
3. virtio-serial driver based on new virtio framework;
4. virtio-rng driver based on new virtio framework;
5. virtio-net driver based on new virtio framework
   (IOB Offload implementation);
6. virtio-blk driver based on new virtio framework;
7. Remove the old virtio mmio framework, the old framework only
   support mmio transport layer, and the new framwork support
   more transport layer and this commit has implemented all the
   old virtio drivers;
8. Refresh the the qemu-arm64 and qemu-riscv virtio related
   configs, and update its README.txt;

New virtio-net driver has better performance
Compared with previous virtio-mmio-net:
|                        | master/-c | master/-s | this/-c | this/-s |
| :--------------------: | :-------: | :-------: | :-----: | :-----: |
| qemu-armv8a:netnsh     |  539Mbps  |  524Mbps  | 906Mbps | 715Mbps |
| qemu-armv8a:netnsh_smp |  401Mbps  |  437Mbps  | 583Mbps | 505Mbps |
| rv-virt:netnsh         |  487Mbps  |  512Mbps  | 760Mbps | 634Mbps |
| rv-virt:netnsh_smp     |  387Mbps  |  455Mbps  | 447Mbps | 502Mbps |
| rv-virt:netnsh64       |  602Mbps  |  595Mbps  | 881Mbps | 769Mbps |
| rv-virt:netnsh64_smp   |  414Mbps  |  515Mbps  | 491Mbps | 525Mbps |
| rv-virt:knetnsh64      |  515Mbps  |  457Mbps  | 606Mbps | 540Mbps |
| rv-virt:knetnsh64_smp  |  308Mbps  |  389Mbps  | 415Mbps | 474Mbps |
Note: Both CONFIG_IOB_NBUFFERS=64, using iperf command, all in Mbits/sec
      Tested in QEMU 7.2.2

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2023-08-10 03:39:39 +08:00
cuiziwei 25eb09c3bb nuttx/boards:add KEEP to *(.init_array .init_array.*)
replace *(.init_array .init_array.*) with KEEP(*(.init_array .init_array.*)).

The KEEP statement within a linker script will instruct the linker to keep the specified section, even if no symbols inside it are referenced. This statement is used within the SECTIONS section of the linker script. This becomes relevant when garbage collection is performed at link time, enabled by passing the --gc-sections switch to the linker. The KEEP statement instructs the linker to use the specified section as a root node when creating a dependency graph, looking for unused sections. Essentially forcing the section to be marked as used.

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2023-08-05 05:02:25 -07:00
Zhe Weng 3d5eae2497 arch/arm64: Enable FPU for qemu-armv8a:netnsh_smp and netnsh_smp_hv
When reading https://github.com/apache/nuttx-apps/pull/1793, I found a previous problem https://github.com/apache/nuttx-apps/pull/1454#discussion_r1045718067 now still exists on current master (inf in iperf bandwidth).

By step-by-step debugging, I found a value of 1000000.0 stored in register d8 is overwritten as 0 after context switch, then fdiv results in inf because of divided by 0. Finally I found that ARCH_FPU is not enabled while compiler is using FPU, and may lose values in floating-point registers.

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2023-07-12 10:04:13 -03:00
Masayuki Ishikawa e78eade641 boards: qemu-armv8a: Add defconfigs for hypervisor
Summary:
- This commit adds netnsh_hv and netnsh_smp_hv to run the NuttX
  with hypervisor environments
- Also updates README.txt

Impact:
- None

Testing:
- Tested with qemu=7.1 + kvm on raspi3b+ (ubuntu server 20.04)
- Tested with qemu-7.1 + hvf on M1/MBP (macOS 12.6.1)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-07-01 10:22:00 -03:00
Masayuki Ishikawa 8bbe7a8825 boards: Enable virtio-blk and FAT for virt configurations
Summary:
- I noticed that virtio-blk and FAT are not enabled for some
  virt configurations.
- This commit enables them for testing.

Impact:
- None

Testing:
- Tested with qemu-7.1
- NOTE: file copy with rv-virt:knetnsh64 is sometimes unstable.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-07-01 13:10:40 +08:00
Masayuki Ishikawa 08da38b535 boards: Enable md5 to test virtio
Summary:
- This commit enables md5 to test virtio

Impact:
- None

Testing:
- Tested with qemu-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-06-11 22:54:06 +08:00
Masayuki Ishikawa 766e0a3b05 boards: Enable NFS to test virtio-mmio-net
Summary:
- This commit enables NFS to test virtio-mmio-net

Impact:
- None

Testing:
- Tested with qemu-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-06-02 16:28:34 +08:00
zhangyuan21 2049ca69b0 arch/arm64: Modify ld to ensure that the bss section is aligned to 8 bytes
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-19 21:38:07 -07:00
Masayuki Ishikawa 8a70f8a76d boards: Add virtio blk driver to qemu-arm8a and rv-virt
Summary:
- This commit adds blk driver to qemu-armv8a:netnsh,
  rv-virt:netnsh and rv-virt:netnsh64
- Also updates README.txt

Impact:
- None

Testing:
- Tested with qemu-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-05-13 13:58:09 +08:00
Lee Lup Yuen 4ed48c33e9 arm64/a64: Add support for Multiple UART Ports
Currently only Port UART0 is supported for Allwinner A64. This PR adds support for all UART Ports: UART1 to UART4. (Except R-UART, which is a special low-power UART)

This is required for the upcoming LTE Modem Driver (Quectel EG25-G) for PINE64 PinePhone, which uses UART3. [(Details here)](https://lupyuen.github.io/articles/lte2)

The code was adapted from the NuttX UART Driver for Allwinner A1X: [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)

`arch/arm64/src/a64/a64_serial.c`: Added ports UART1 to UART4, based on [`a1x_serial.c`](https://github.com/apache/nuttx/blob/master/arch/arm/src/a1x/a1x_serial.c)

`arch/arm64/src/a64/a64_serial.h`: Added IRQs for UART1 to UART4. Moved UART Base Addresses to `a64_memorymap.h`

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added UART Base Addresses for UART0 to UART4

`arch/arm64/src/a64/Kconfig`: Added UART1 to UART4 to Allwinner A64 Peripheral Selection menu

`boards/arm64/a64/pinephone/configs/lcd/defconfig`, `lvgl/defconfig`, `nsh/defconfig`, `sensor/defconfig`: Fixed `UART1_SERIAL_CONSOLE` to `UART0_SERIAL_CONSOLE`
2023-05-11 09:41:18 +02:00
hujun5 d0139d1206 arch/arm64: change config order
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-10 09:06:59 +02:00
hujun5 7f4cb3057a arch/arm64: merge serial_pl011.c and qemu_serial.c
At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated
and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module,
so that both fvp-v8r and qemu can use the same code.
In the future, if new platforms use pl011 serial ports, they can also be directly reused

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-10 09:06:59 +02:00
qinwei1 2eac660ff6 arm64: Updating ARCH_EARLY_PRINT support
Summary:
  Keeping this option out of depend on any common serial.
Using the option, need to implement xxx_lowputc.S/c.
  You can also logging the booting message through rewriting
fake arm64_lowputc with other debug method (eg semihosting,
ARM debug channel etc).

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-05-09 21:00:48 +08:00
qinwei1 c4f3f8801f arm64: Support for FPU profiling with procfs
Summary:

   To reduce the count of FPU context switching will result at a
performance improve with system. it need to balance between
the using of FPU and counts of FPU trap
   the PR submit a base method to see performance counts for
the FPU with NuttX procfs
   Please read README.txt at chapter of FPU Support and Performance
for more information

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-04-22 01:38:21 +08:00
zhangyuan21 dfcba925e7 arch/arm64: add cache enable and disable function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-04-22 01:22:04 +08:00
hujun5 abbc661282 arch/arm64:add tickless configure
add configure CONFIG_SCHED_TICKLESS=y to qemu-armv8a:nsh_smp_tickless

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-04-22 01:08:04 +08:00
qinwei1 e696e99d9a arm64: Update readme.txt for FVP platform
Summary:

   Updating Readme.TXT for FVP platform.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-05 01:56:17 +08:00
qinwei1 d2d954f691 arm64: ARMv8-r(Cortex-R82) support( add FVP platform )
Summary:
   Adding virtual evaluate platform FVP. This FVP board configuration
will be used to emulate generic ARM64v8-R (Cotex-R82)series hardware
platform and provide support for these devices:

 - GICv3 interrupt controllers for ARMv8-r
 - PL011 UART controller(FVP)

Note:
1. ostest is PASSED at fvp ( single core and SMP)
2. the FVP tools can be download from ARM site, please check FVP
  board readme.txt

TODO: merge PL011 UART driver to common place

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-02 13:33:15 +08:00
qinwei1 d5c6b8a94b arm64: add 64-bit time for all arm64 platform
Summary
  For ARM64 architecture, the arch timer is 64-bit,
the CONFIG_SYSTEM_TIME64 need to be enabled just like
x86_64 and risc-v 64

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1 4240723b78 arm64: add ARCH_EARLY_PRINT support
Summary:
  The aarch64 have EL0~El3 execute level and NS/S (security state),
the NuttX should be execute at EL1 in NS(ARmv8-A) or S(ARmv8-R)
state. but booting NuttX have different ELs and state while with
different platform, if NuttX runing at wrong ELs or state it will
be not normal anymore. So we need to print something in arm64_head.S
to debug this situation.
Enabling this option will need to implement up_earlyserialinit and
up_lowputc functions just you see in qemu, if you not sure,
keeping the option disable.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
Xiang Xiao 2c5f653bfd Remove the tail spaces from all files except Documentation
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-02-26 13:24:24 -08:00
chao an 3a0fdb019d nuttx: replace all ARRAY_SIZE()/ARRAYSIZE() to nitems()
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-09 20:05:44 +08:00
Xiang Xiao d7ee492fc4 board/arch: Remove FAR decorator
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-01-25 13:05:07 +02:00
Lee Lup Yuen c07bd5d644 arm64/pinephone: Add driver for PinePhone Touch Panel
This PR adds the existing Goodix GT9XX Touch Panel Driver to the Bringup Function for PINE64 PinePhone.

With this PR, LVGL Touchscreen Apps will respond to Touch Input on PinePhone.

### Modified Files

`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Added GT9XX Touch Panel Driver to PinePhone Bringup Function

`boards/arm64/a64/pinephone/src/Makefile`: Added `pinephone_touch.c` to the Makefile

`include/nuttx/input/gt9xx.h`: Fixed a comment in GT9XX Touch Panel Driver

### New Files

`boards/arm64/a64/pinephone/src/pinephone_touch.c`, `pinephone_touch.h`: Register GT9XX Touch Panel Driver on PinePhone

`boards/arm64/a64/pinephone/configs/lvgl/defconfig`: Added PinePhone Board Config `lvgl` to support LVGL Touchscreen Apps

### Updated Documentation

`Documentation/platforms/arm/a64/boards/pinephone/index.rst`: Added PinePhone Board Config `lvgl` for LVGL Touchscreen Apps
2023-01-16 13:45:17 +08:00
zouboan 8d7c1541c5 boards/pinephone: add support of MPU6050 2023-01-03 01:45:56 +08:00
Lee Lup Yuen 991fd3d887 arm64/pinephone: Fix missing pixels in Frame Buffer Driver
This PR fixes the missing pixels in the rendered output of the Frame Buffer Driver for PINE64 PinePhone.

We fix this by copying the RAM Frame Buffer to itself on Frame Buffer Update `FBIO_UPDATE`, which will refresh the display correctly over DMA / Display Engine / Timing Controller TCON0.

### Modified Files

`boards/arm64/a64/pinephone/Kconfig`: Add requirement for Frame Buffer Update `FB_UPDATE` for PinePhone LCD Display

`boards/arm64/a64/pinephone/src/pinephone_display.c`: Implement Frame Buffer Update `FBIO_UPDATE` by copying the RAM Frame Buffer to itself
2022-12-30 11:05:27 +08:00
Lee Lup Yuen f9bd04ff19 arm64/pinephone: Add driver for Frame Buffer
This PR adds the Frame Buffer Driver for PINE64 PinePhone. With this driver, NuttX Apps will be able to use the standard Frame Buffer API to render graphics on PinePhone.

`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Render Test Pattern after calling `up_fbinitialize()` to start the Frame Buffer Driver

`boards/arm64/a64/pinephone/src/pinephone_display.c`: Add Frame Buffer Driver

`boards/arm64/a64/pinephone/src/pinephone_display.h`: Declare new function for rendering Test Pattern

`platforms/arm/a64/boards/pinephone/index.rst`: Add Frame Buffer as supported driver for PinePhone
2022-12-28 23:06:45 +08:00
Lee Lup Yuen 17639af0a8 arm64/pinephone: Add driver for LCD Panel (Xingbangda XBD599)
This PR adds the driver for Xingbangda XBD599 LCD Panel (based on Sitronix ST7703 LCD Controller) on PINE64 PinePhone. This PR also includes:

- The driver for X-Powers AXP803 Power Mgmt IC, which calls our driver for Allwinner A64's Reduced Serial Bus. The PMIC Driver is needed to power on the MIPI DSI Interface for the LCD Panel.

- A simple Display Driver that renders a Test Pattern on the LCD Display at startup. It calls our Allwinner A64 drivers for Display Engine, Timing Controller TCON0 and MIPI Display Serial Interface.

The NuttX Frame Buffer Driver will be implemented in the next PR.

`arch/arm64/src/a64/a64_de.c`, `a64_de.h`: Changed the Frame Buffer pointer to `const` for Allwinner A64 Display Engine

`arch/arm64/src/a64/hardware/a64_memorymap.h`: Added the Base Address for PWM, for controlling the PWM Backlight

`boards/arm64/a64/pinephone/src/pinephone_bringup.c`: Call `fb_register()` to start the Display Driver at startup

`boards/arm64/a64/pinephone/src/Makefile`: Added LCD Driver, PMIC Driver and Display Driver to Makefile

`boards/arm64/a64/pinephone/Kconfig`: Added the Kconfig option for "PINE64 PinePhone > LCD Display" (`CONFIG_PINEPHONE_LCD`) which enables the LCD Driver, PMIC Driver and Display Driver

`boards/arm64/a64/pinephone/src/pinephone_lcd.c`, `pinephone_lcd.h`: Driver for Xingbangda XBD599 LCD Panel

`boards/arm64/a64/pinephone/src/pinephone_pmic.c`, `pinephone_pmic.h`: Driver for X-Powers AXP803 Power Mgmt IC

`boards/arm64/a64/pinephone/src/pinephone_display.c`: Simple Display Driver that renders a Test Pattern in `up_fbinitialize()`

`boards/arm64/a64/pinephone/configs/lcd/defconfig`: New PinePhone Board Configuration `pinephone:lcd` that enables the LCD Driver (`CONFIG_PINEPHONE_LCD`)

`platforms/arm/a64/boards/pinephone/index.rst`: Added PinePhone Board Configuration `pinephone:lcd` that enables the LCD Driver
2022-12-27 11:44:17 +08:00