Alin Jerpelea
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c39339a7a8
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arch: arm: include: nxstyle fixes
nxstyle fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
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2021-03-22 19:28:38 -07:00 |
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Alin Jerpelea
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4daa276903
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arch: arm: include: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
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2021-03-22 19:28:38 -07:00 |
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Dave Marples
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d0cda60442
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In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
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2018-12-03 17:41:59 -06:00 |
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David S. Alessio
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7f2c4c4274
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XMC4xxx: Add FPU support
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2017-03-22 12:04:32 -06:00 |
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Gregory Nutt
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886dadae0a
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XMC4xxx: Minor updates to naming and comments
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2017-03-20 18:10:23 -06:00 |
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Gregory Nutt
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b9e29d1083
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XMC4xxx: Clean up memory map
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2017-03-20 17:08:09 -06:00 |
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Gregory Nutt
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4ba091933e
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XMC4xxx: Fix for early bringup problems
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2017-03-20 16:31:35 -06:00 |
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Gregory Nutt
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5c0be816a5
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XMC4xxx: Add commin USIC support logic for use in all USIC configurations.
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2017-03-19 12:48:37 -06:00 |
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Gregory Nutt
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5693f26a5e
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XMC4xx: Fix several early compilation problems.
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2017-03-16 11:30:02 -06:00 |
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Gregory Nutt
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2430049e3b
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arch/arm/include/xmc4: More support for Infineon XMC4xxx arch. Still incomplete.
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2017-03-14 13:04:09 -06:00 |