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55,199 Commits 18 Branches 185 Tags 426 MiB
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34 Commits

Author SHA1 Message Date
hujun5 0561b55860 arm: optimize up_interrupt_context used in armv[6/7/8]-m 
resson:
using percpu storage for g_current_regs or leveraging interrupt status
registers to determine if code is running within an interrupt context can enhance performance.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-09-19 08:30:09 +08:00
hujun5 6a3a32b185 arch: move up_interrupt_context to arch specific irq.h 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-09-19 08:30:09 +08:00
hujun5 a754c517cc irq: use per-cpu reg to replace g_current_regs 
Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-09-19 08:30:09 +08:00
hujun5 ea181e2621 arm: armv7-a/r and armv8-r up_cpu_index inline 
reason:
inline small code to improve performance

Signed-off-by: hujun5 <hujun5@xiaomi.com>
 2024-09-06 03:44:49 +08:00
pangzhen1 dee4c63adb protected build: userspace threads will unexpectly work in privileged mode after syscall 
In protected build mode, the syscall returns without setting correct value for the CONTROL register, which causes the userspace threads working in privileged mode after syscall.

Signed-off-by: pangzhen1 <pangzhen1@xiaomi.com>
 2024-08-28 13:44:37 +08:00
yanghuatao 3e171489bd toolchain/ghs: Fix green hills toolchain build Vela link error 
[elxr] (error #412) unresolved symbols:
 __builtin_frame_address     from libarch.a(arm_checkstack.o)

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
 2024-08-11 14:27:02 -03:00
wangming9 eba9c61cad arch/armv6-m: Add CONTROL register to xcptcontext. 
To simplify the interrupt handling in protected mode.

Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2023-08-07 05:43:13 -07:00
wangming9 a4b6b158ce arch/armv6-m: By default, add REG_EXC_RETURN to xcptcontext. 
Signed-off-by: wangming9 <wangming9@xiaomi.com>
 2023-08-07 05:43:13 -07:00
Xiang Xiao e17b678a16 compiler.h: Rename inline_function to always_inline_function 
reserve inline_function macro for inline keyword

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-07 10:24:04 +02:00
chao.an 7b9978883c arch/arm: optimize context switch speed 
The current context save implementation saves registers of each task
to xcp context, which is unnecessary because most of the arm registers are
already saved in the task stack, this commit replace the xcp context with
stack context to improve context switching performance and reduce the tcb
space occupation of tcb instance.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-15 23:03:51 +09:00
chao.an 0a8d951837 arch/arm: correct the frame pointer register declare 
In AArch32, the frame pointer is stored in register R11 for ARM code or register R7 for Thumb code.
In AArch64, the frame pointer is stored in register X29.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-19 01:26:07 -07:00
Xiang Xiao 7e0db977cc arch/arm: Add CONTROL register bit field definition 
and replace all hardcode value

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-07 09:20:10 -03:00
Alin Jerpelea c39339a7a8 arch: arm: include: nxstyle fixes 
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Alin Jerpelea 4daa276903 arch: arm: include: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Nathan Hartman 679b4fbee2 arch: Fix included directed -> included directly 
This typo had been copied and pasted into numerous irq and syscall
headers.
 2020-04-05 22:31:15 +01:00
Xiang Xiao 68951e8d72 Remove exra whitespace from files (#189) 
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
 2020-01-31 09:24:49 -06:00
Gregory Nutt abf6965c24 Squashed commit of the following: 
libs/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    syscall/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    wireless/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    Documentation/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    include/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    drivers/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    sched/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    configs:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/xtensa:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/z80:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/x86:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/renesas and arch/risc-v:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/or1k:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/misoc:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/mips:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/avr:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/arm:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
 2019-04-29 14:52:05 -06:00
Gregory Nutt b1001b4e50 Update TODO list regarding non-queuing of signal actions; Add comments in code at areas where the issue applies. 2019-02-04 08:35:03 -06:00
Xiang Xiao 2e70eef767 arch/arm/include/armv-7m/irq.h and armv6-m/irq.h: Remove redundant conditioning on CONFIG_BUILD_PROTECTED 2019-01-26 07:04:15 -06:00
Gregory Nutt 666cc280f4 Rename irqenable() to up_irq_enable(); rename irqdisable() to up_irq_disable() 2016-02-14 16:54:09 -06:00
Gregory Nutt 83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt 36726b1bc4 Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
Gregory Nutt cbdafb96d5 Remove unused function setipsr. Cortex-M IPSR register is not writable 2015-09-23 08:38:32 -06:00
Gregory Nutt 29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt e11679acf8 Rename CONFIG_NUTTX_KERNEL to CONFIG_BUILD_PROTECTED; Partially integrate new CONFIG_BUILD_KERNEL 2014-08-29 14:47:22 -06:00
Gregory Nutt 8dd679e875 ARMv7-A: Add SYSCALL handling logic 2014-08-28 14:52:14 -06:00
Gregory Nutt 36ead78f07 ARMv6-M/ARMv7-M: Correct a register handling error in signal delivery (Kernel build mode only). Noted by Mike Smith. 2014-02-23 08:25:49 -06:00
Gregory Nutt a8004f9e07 Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
patacongo 990c1febf8 Add support for nested system calls 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5752 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-17 16:13:28 +00:00
patacongo c702374d7b Add support for calling to and returning from signal handlers in in user-mode threads 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5750 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-17 00:40:49 +00:00
patacongo d256021c41 More MPU-related fixes 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5746 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-16 00:34:43 +00:00
patacongo bd1488bdab Fix some bad syscall dispatching log. This change is not testable until these is a tested NuttX kernel build. 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5713 42af7a65-404d-4744-a932-0658087f49c3
 2013-03-06 19:56:32 +00:00
patacongo 4d046b493e More Cortex-M0 fixes 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5671 42af7a65-404d-4744-a932-0658087f49c3
 2013-02-25 23:00:19 +00:00
patacongo 8e11e189f4 First cut at support for Cortex-M0 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5655 42af7a65-404d-4744-a932-0658087f49c3
 2013-02-16 16:32:19 +00:00