Commit Graph

5959 Commits

Author SHA1 Message Date
Gregory Nutt 19d7c90d4e USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt 0524688c71 Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
Gregory Nutt 44dd71de4e Completes EHCI header file 2013-08-18 09:01:16 -06:00
Gregory Nutt dc07d65e14 STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao 2013-08-18 07:45:14 -06:00
Gregory Nutt e2f68ac85f Add EHCI header file (not quite complete) 2013-08-17 14:19:18 -06:00
Gregory Nutt 11086f34d0 SAMA5 OHCI: Driver is now basically functional 2013-08-16 13:13:21 -06:00
Gregory Nutt 1fb80e0917 SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated 2013-08-16 11:36:51 -06:00
Gregory Nutt 10daf06976 STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen 2013-08-16 11:35:22 -06:00
Gregory Nutt ca739ce76d SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases 2013-08-15 17:15:08 -06:00
Gregory Nutt 7f733b0472 SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected 2013-08-15 15:28:27 -06:00
Gregory Nutt 371639637f SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no idea why 2013-08-14 19:38:48 -06:00
Gregory Nutt 0098c9ec5f SAMA5: ports should not be reset state (seems to make no difference) 2013-08-14 17:33:31 -06:00
Gregory Nutt fe73fe2e23 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt 152a5e6da6 SAMA5: Fix out of range USB PLL divisor 2013-08-14 14:20:01 -06:00
Gregory Nutt 79d5239023 SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary 2013-08-14 12:23:06 -06:00
Gregory Nutt 16ac25fd09 Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5 2013-08-13 17:43:19 -06:00
Gregory Nutt 3f4b90cc3b SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port. 2013-08-13 16:48:14 -06:00
Gregory Nutt 1700d06d89 Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports. 2013-08-13 15:03:46 -06:00
Gregory Nutt a65ac5bc72 Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed 2013-08-13 14:12:27 -06:00
Gregory Nutt b575450a04 Separate SAMA5 OHCI interrupt handling into separate functions 2013-08-13 13:34:35 -06:00
Gregory Nutt ad258cb3b7 SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes 2013-08-13 09:44:16 -06:00
Gregory Nutt 9220a748bd Fix re-entry problem in SAMA5 up_putc 2013-08-13 09:42:40 -06:00
Gregory Nutt 1ec49f08b4 STM32 F3 fixes from John Wharington 2013-08-13 07:48:18 -06:00
Gregory Nutt 120a3604c9 More changes to USB host interface to support multiple downstream ports 2013-08-12 16:29:33 -06:00
Gregory Nutt a384129490 Convert olimex-stm32-p107/nsh configuration to use kconfig-frontends tool. From Max Holtzberg 2013-08-12 15:00:28 -06:00
Gregory Nutt e09bd50fdd First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt 0da218483d SAMA5: Add logic to control VBUS power for OHCI 2013-08-12 11:59:10 -06:00
Gregory Nutt e2d7ab9487 SAMA5: Add support for initialization of the USB host and mass storage class 2013-08-11 17:52:36 -06:00
Gregory Nutt ed49812d2c Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt dd3c682443 SAMA5: Some improvements to the HSCMI card removal/insertion logic 2013-08-11 11:13:11 -06:00
Gregory Nutt d6264c2c1f Add CAN configuration to STM32 config menu 2013-08-10 19:37:35 -06:00
Gregory Nutt 054468d151 STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier 2013-08-10 19:33:16 -06:00
Gregory Nutt 544185c683 Added option to disable STM32 serial port re-ordering 2013-08-10 19:29:44 -06:00
Gregory Nutt 0f20d4581b Added FIONREAD and FIONWRITE to CDC/ACM driver. From Lorenz Meier 2013-08-10 19:21:39 -06:00
Gregory Nutt 82b528e0c8 Serial FIONREAD, FIONWRITE, and TERMIOS I/O processing from Mike Smith, Andrew Tridgell, and and Lorenz Meier 2013-08-10 19:14:05 -06:00
Gregory Nutt 97e13b33ab MMC/SD SDIO: Correct return values when multiple block transfers are suppressed. From Andrew Tridgell via Lorenz Meier 2013-08-10 18:29:22 -06:00
Gregory Nutt da4cebf572 SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA 2013-08-10 18:01:23 -06:00
Gregory Nutt d60e9e14f6 Remove some pre-processor warnings that I am more than tired of seeing 2013-08-10 09:18:57 -06:00
Gregory Nutt 968b2553cd Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level 2013-08-10 09:06:53 -06:00
Gregory Nutt c5e66ae051 Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM. 2013-08-09 17:55:27 -06:00
Gregory Nutt efabe4aaff SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt 619cd66f33 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt 628f50ba61 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt 417636e1de SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt 83cbd61c8c SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer 2013-08-08 13:15:52 -06:00
Gregory Nutt 9d81d4727c More SAMA5 DMAC driver fixes. Still does not work. 2013-08-07 17:19:48 -06:00
Gregory Nutt 2df1d56a01 SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers 2013-08-07 11:32:08 -06:00
Gregory Nutt 4369c172df Change setup logic to hand MTD minor numbers for AT24, HSMCI0, and HSMCI1 2013-08-07 11:31:31 -06:00
Gregory Nutt bfaf64e54e Fix SAM bug: Parmaters reversed in DMA function call 2013-08-06 15:47:09 -06:00
Gregory Nutt b0e8231fa3 SAM3,4,A5 DMAC driver fixes 2013-08-06 13:27:48 -06:00