Commit Graph

1688 Commits

Author SHA1 Message Date
simbit18 1661a66843 [cmake]: added initial support for MSYS2
Currently concerns only arm.

tools/ci/testlist/msys2.dat:
At the moment I only added the board nucleo-l152re:nsh

.github/workflows/build.yml:
Enabled cmake for msys2
2024-08-27 21:36:12 +08:00
guoshichao dd8b630b0d nuttx: add GREENHILLS compiler config option
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-08-27 01:56:34 +08:00
Matheus Catarino 25bd3be167 tools/ci: add zig, ldc and swift
The main objective is to determine if the examples really work or if they have been obsoleted.
The languages included in the list promote good interoperability with the NuttX API (C predominant).

This will show if they are worth integrating in NuttX.

**FFI method**

- Rust: bindgen or c2rust
- D: importC
- Swift: Bridging header or clang modulemap.
- Zig: `@cImport/@cInclude` or translate-c
2024-08-26 10:25:54 +08:00
Matheus Catarino 93b520f7b0 swift6 embedded support 2024-08-23 09:02:20 +08:00
jianglianfang f5fe7646ed sim: read the second buffer
It can only read the contents of the first buffer, so fblen should be changed to ensure that it can read the second buffer as well.

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2024-08-22 16:17:43 +08:00
liqinhui be942853c4 simwifi: Add debug info and disable the wifi of networkmanager.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2024-08-21 23:36:26 +08:00
anjiahao 9eadf61e90 toos/gdb:sync mempool memdump method
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:24 +08:00
anjiahao 9478f5b6d4 tools/gdb:add get_symbol_value api
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:24 +08:00
anjiahao fcf06f6367 gdbserver:minidumpserver is powerful, so change name to gdbserver
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao 03f0a59816 minidumpserver:Special processing xtensa architecture
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao 0a7d731eb7 minidumpserver:change logger format to debug
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao 4d05e69c1d minidumpserver:thread awarenes bug fix
1. need to continue if tcbptr is NULL
2. need use g_last_regs to show running regs
3. get a bad range

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao 8e0fb2c433 minidumpserver:support use coredump restore the crash scene
The benefit of this approach is that in a multi-core AMP system,
a single coredump might contain memory information from other cores.
By analyzing this coredump along with the corresponding ELF files from
the other cores, you can reconstruct the crash site of those other
cores.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao f52a3d314e minidumpserver:support thread awareness
If we have a full memory raw dump, we can parse g_tcbinfo, g_npidhash,
and g_pidhash from the ELF to get NuttX thread info,
regardless of the crash dump log file.

support new command in gdb:
  info threads
  thread id

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao 65ef1f72c1 minidumpserver.py:Improve socket performance of minidumpserver.py
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao bb24fd9108 minidumpserver.py:support gdb can set register
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao f3e2b532e1 minidumpserver.py:support rawfile load
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
anjiahao 3a435b2eab minidumpserver.py:avoid port already used
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-21 18:01:06 +08:00
xinbingnan 942081ec6c minidumpserver: fix parsing bug
stack dump add new region `show stacks`, but this script is not support
now this is fixed with adding check condition for all lines contains stack word

Signed-off-by: xinbingnan <xinbingnan@xiaomi.com>
2024-08-19 19:54:06 +08:00
cuiziwei 4c70918888 tools/parsetrace.py:fix parsetrace script error.
Traceback (most recent call last):
  File nuttx/tools/parsetrace.py, line 29, in <module>
    from pycstruct import pycstruct
ModuleNotFoundError: No module named 'pycstruct'

Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2024-08-19 13:53:30 +08:00
fanjiangang 5e9358b782 make/disassembly: generate disassembly file
Create the nuttx.asm in the disassembly format using the objdump program.

NOTE:
'>', objdump doesn't take arguments for output file,
but result is printed to standard out, and is redirected.

Signed-off-by: fanjiangang <fanjiangang@lixiang.com>
Signed-off-by: chao an <anchao@lixiang.com>
2024-08-16 15:22:25 +08:00
Lup Yuen Lee 52583fc17e tools/ci: Add Rust Target for QEMU RISC-V 64-bit
This PR updates the Docker Image for NuttX CI, so that it builds Rust Apps correctly for QEMU RISC-V 64-bit. We add the Rust Target for `riscv64gc-unknown-none-elf` to the Docker Image.

In the next PR, we will call the Updated Docker Image to [compile the Rust App `leds_rust`](https://github.com/apache/nuttx/pull/12852), at every run of NuttX CI. This will validate whether Rust Apps are built correctly for QEMU RISC-V 64-bit.

Modified Files:

`tools/ci/docker/linux/Dockerfile`: Add Rust Target `riscv64gc-unknown-none-elf` for Docker CI

`tools/ci/platforms/ubuntu.sh`: Same as above, but for Ubuntu CI

`tools/ci/platforms/msys2.sh`: Same as above, but for MSYS2 CI
2024-08-07 19:59:56 +08:00
Lup Yuen Lee 788f91c677 tools/[Rust|D]: Fix the Rust and D Builds for QEMU RISC-V
This PR fixes the build for Rust Apps and D Apps on QEMU RISC-V. Previously the Rust Build selected the [incorrect Rust Target riscv64i-unknown-none-elf](https://lupyuen.github.io/articles/rust5#rust-target-is-incorrect). Now the Rust Build selects the correct Rust Target: riscv64gc-unknown-none-elf.

This PR also fixes the 32-bit RISC-V Target for D Apps. D Targets ("riscv32") are named differently from Rust Targets ("riscv32gc"), this PR restores the correct Target Names.

Note that Rust Apps won't build correctly for QEMU RISC-V 32-bit. This requires a [Rust Custom Target for riscv32gc](https://lupyuen.github.io/articles/rust4#custom-target-for-rust), which will make the NuttX Makefiles much more complicated.

Also note that `hello_d` won't build correctly for 64-bit `rv-virt:nsh64`. To date, NuttX has never supported 64-bit RISC-V for D Apps.

Modified Files:

`tools/Rust.defs`: Rename the RISC-V ISA `imafdc` to `gc` for Rust Targets

`tools/D.defs`: Exclude the RISC-V ISA for D Targets
2024-08-07 10:03:43 +08:00
Huang Qi 1eca39eacc tools/[Rust|D]: Fix build break for RISC-V
Rust/D support for RISC-V is broken after https://github.com/apache/nuttx/pull/11549,
since the target triple is quite different bewteen Rust/D toolchain and GCC,
only few RISC-V targets are supported by Rust toolchain now, so it's better to
construct target triple in Rust.defs/D.defs for RISC-V.
2024-08-05 16:20:19 +08:00
Alexey Matveev e9d20bd611 Add mkfsdata.py 2024-08-03 01:29:09 +08:00
buxiasen 1de538282e tools/parsememdump: speed up use mem addr cache and multi-thread
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-08-02 13:40:14 +08:00
anjiahao 8acd8e5236 fix parsememdump.py statistics error bug
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-02 13:40:14 +08:00
anjiahao bc55750d71 parsememdump.py:fix bug determine whether it is the memory of the same backtrace
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-02 13:40:14 +08:00
anjiahao 6f23c8d943 parsememdump.py:fix bug add prefix addr2line
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-08-02 13:40:14 +08:00
Luchian Mihai 780366de62 tools: nxstyle if statement check
nxstyle will print an error on a single line if statement
2024-07-31 17:56:47 +08:00
simbit18 c4efab7eea tools/testbuild.sh: added store compilation artifacts for cmake
Added the ability to store compilation artifacts for cmake after a job.
2024-07-30 21:36:26 +08:00
simbit18 3637040d73 tools/ci/testlist: Added jobs to speed up CI checks.
Divided jobs risc-v and xtensa to finish workflow under 2 hours.
2024-07-30 01:43:29 +08:00
Huang Qi 9240e1b5ce nxstyle: Add Dl_info to white list
Avoid the mixed case identifiers warning
for Dl_info which is from the POSIX.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-07-26 14:39:10 -03:00
simbit18 1540dc2d67 tools/testbuild.sh: add option -N use CMake with Ninja
tools/testbuild.sh
     added option -N Use CMake with Ninja as the backend.

    updated help.

    added date to print startup board

   added HOST=Msys

github/workflows/build.yml

   added option -N job docker
2024-07-18 13:40:20 +08:00
Eren Terzioglu 0df037855a esp32[c3]: Add mcuboot build script for esp32c3-legacy 2024-07-16 10:30:56 +08:00
Eren Terzioglu a9082e0882 esp32[s2]: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
Eren Terzioglu c9f5ae5fa4 esp32[s3]: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
Eren Terzioglu 024e95875a esp32: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
Eren Terzioglu 553b1f5f5e esp32[c3|c6|h2]: Add nuttx toolchain support on mcuboot 2024-07-16 10:30:56 +08:00
Eren Terzioglu 0f0c258fa2 esp32[c6]: Add MCUBoot support 2024-07-14 11:38:29 +08:00
simbit18 2f8560e838 tools/ci: enable avr32dev1 build
removed in the tools/ci/testlist/other.dat file the entries
 -avr32dev1:nsh
 -avr32dev1:ostest

avr32_bringup.c
Fix  Error: ./avr32_bringup.c:54:4: error: #warning "Not Implemented"

comment out directive '#warning'
/* #warning "Not Implemented" */

avr_doirq.c

fix avr32/avr_doirq.c:117: error: assignment discards qualifiers from pointer target type
  regs = g_current_regs; -> regs = (uint32_t *)g_current_regs;
2024-07-12 00:39:21 +08:00
Eero Nurkkala 80c37c7b36 tools/imx9: prepare bootable bootloader image
This does the following:
  1. Fetches mkimage_imx8 (same used with imx9) source code
  2. Fetches the ELE / AHAB binary
  3. Extracts the ELE / AHAB binary
  4. Compiles the mkimage with hostcc
  5. Utilizes the mkimage tool to create a bootable SD image,
     combining the ELE / AHAB image with the NuttX bootloader
  6. dd is used to prepend empty space in place of BL31
  7. Outputs sdimage.img which is a bootable binary
  8. Removes all binaries, sources code images that have been
     downloaded

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2024-07-10 22:30:38 +08:00
Almir Okato 457f9d3dce ci: update required esptool version to 4.8.dev4
This esptool version is required when building the
default Simple Boot for Espressif chips.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
Almir Okato 593dc946d1 esp32: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-07-04 18:22:24 -03:00
simbit18 a3828c08da tools/ci/docker/linux/Dockerfile: add AVR32 GCC toolchain
Add prebuilt AVR32 GCC toolchain
2024-06-18 23:15:39 +08:00
Tiago Medicci Serrano 6c3eeb7d5c espressif: Remove outdated config about IDF bootloader
For newer devices, IDF bootloader is not supported because the
devices are able to boot directly into NuttX or use MCUBoot to
enable OTA and security features.
2024-06-12 16:11:56 +08:00
Xu Xingliang 5fd03186af tools/minidumpserver: fix 32bit crash log parsing
Need to distinguish between 32bit and 64bit registers, format the gdb reply message using struct.pack with correct format.
'<I' is used for 32bit registers, '<Q' for 64bit

Do not raise exeption for unrecognized registers in log, since they are
not used.

Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
2024-06-08 12:02:51 +08:00
Matheus Catarino c6eea4ad8b add LDC2 (dlang) support
*Note:* ldmd2 is ldc2-wrapper, allow using dmd frontend flags.
      This support may be extended to gdc (gnu) if nuttx developers demand it
  or are interested in it.
2024-06-06 09:32:56 +08:00
Almir Okato 4178f3ede4 esp32s2: remove legacy bootloader support
Deprecate Legacy Boot for ESP32-S2.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-06-04 18:53:14 -03:00
Almir Okato 16f8966fa9 esp32s2: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-06-04 18:53:14 -03:00