Commit Graph

3 Commits

Author SHA1 Message Date
Alan Carvalho de Assis c27c33e9a9 Run refresh.sh to update all board configs 2023-09-02 14:45:44 +08:00
Xiang Xiao a967da5270 arch/riscv: Move -mcmodel=medany from Make.defs to Toolchain.defs
to avoid the code duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-25 21:22:47 +03:00
Lee Lup Yuen a59673b526 boards/risc-v: Add support for PINE64 Star64 JH7110 SBC
This PR adds support for PINE64 Star64 64-bit RISC-V SBC, based on StarFive JH7110 SoC. Most of the code is derived from NuttX for QEMU RISC-V (Kernel Mode). [The source files are explained in the articles here](https://github.com/lupyuen/nuttx-star64)

Modified Files:

boards/Kconfig: Added Star64 board

New Files in boards/risc-v/jh7110/star64:

src/jh7110_appinit.c: Startup Code

include/board.h: Star64 Definitions

include/board_memorymap.h: Memory Map

src/etc/init.d/rc.sysinit, rcS: Startup Script

src/.gitignore: Ignore the tmp filesystem

scripts/ld.script: Linker Script

scripts/Make.defs: Star64 Makefile

src/Makefile: Star64 Makefile

Kconfig: Star64 Config

configs/nsh/defconfig: NSH Build Config

Updated Documentation:

introduction/detailed_support.rst: Added StarFive JH7110 SoC and Star64 SBC

platforms/risc-v/jh7110/index.rst: New page for StarFive JH7110 SoC

platforms/risc-v/jh7110/boards/star64/index.rst: Building and booting NuttX for Star64
2023-08-07 01:08:35 -07:00