boards/z80/ez80/z20x: Increase RX buffer size to 4Kb, reduce BAUD to 2400 in w25boot configuration
arch/z80/src/ez80/ez80_serial.c: Reduce Rx FIFO trigger level for eZ80F92 to 1 so that will respond more quickly to incoming data.
Also fix the following build warning:
chip/sam_serialinit.c: In function 'sam_earlyserialinit':
chip/sam_serialinit.c:71:4: warning: implicit declaration of function 'uart_earlyserialinit'; did you mean 'sam_earlyserialinit'? [-Wimplicit-function-declaration]
71 | uart_earlyserialinit();
| ^~~~~~~~~~~~~~~~~~~~
| sam_earlyserialinit
Change-Id: I93adc5be739c222482b552b6e143e44c8c047794
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
boards/z80/ez80/z20x/src/w25_main.c: Improve user interface.
There is still an error occurring while downloading Intex HEX files to FLASH. That is unrelated to this and appears to be a problem libs/libc/hex2gbin/lib_hex2bin.c
arch/z80/src/ez80/ez80_timerisr.c: Fix an error that looks the file got damaged by a bad keystroke in the editor while a string was highlighted.
boards/z80/ez80/z20x/src/ez80_spi.c: Fix some bad conditional compilationi. Prevented W25 chip select from being initialized.
This reverts commit f735584514.
These header changes introduce unacceptable errors:
1. The changes alter the width of the initial block comment. That will cause nxstyle failures on most of the files.
2. The third line of the header is an (optional) short description of content of the the file. This change erroneously removes that line.
Automated header file changes can screw up a lot of files, very quickly.
Commit 797e45d6bf attempted to reduce the frequency of SPI reconfiguration by keeping track of the current frequency and mode settings and changing these settings only when the new settings differ from the old settings.
However, the original commit neglected to save the new frequency setting and, hence, was not effective in what it was trying to do: Every time the SPI setfrequency() method was called, it still looked like a new frequency and the frequency was still reconfigured, even though it hadn't really changed.
arch/z80/src/ez80/ez80_spi.c: Add logic checks to eliminate unnecessary SPI reconfiguration.
arch/z80/src/ez80/ez80_timerisr.c and arch/z80/src/ez80/ez80f92.h: Fix numerous places where configurations began with CONFIGS_ instead of CONFIG_
arch/z80/src/ez80/ez80_spi.c: Do not configure SPI chip select pin. It is not used by the driver and configuring it just clobbers other usage of that pin. Add some additional debug outputs; correct some exiting debug outputs.
drivers/mtd/w25.c: Add some debug output.
boards/z80/ez80/z20x/src/ez80_w25.c: Correct SPI bus number used in initialization. Only SPI1 is supported.
arch/z80/src/ez80/ez80_timerisr.c: Some initial timer configuration fixes.
The DBGMCU_APB1_FZ bit persists over regular software resets until next POR-reset. It can impact device power consumption and things that persist over resets are a bane for FOTA updates so make it disabled by default.
OpenOCD sets this via DAP when connecting to target so enabling this from Kconfig is only useful for users of some other debug tooling.
* SAMA5D27 peripheral support - USB Host working
- updated nsh defconfig with vfat for testing USB Host
- sama5d2_xult: USB Host worked.
- ported sam_bringup.c code from sama5d3-xplained
- USB 2.0 HS now working
- other perpherals may work, but haven't been tested
* update license headers to approve NuttX Apache-2.0
arch/z80/: include/ez80/irq.h, src/ez80/ez80f92_*.asm: Correct some comments related to vector address offsets.
boards/z80/ez80/z20x/scripts/z20x_loader.linkcmd: Fix RAM offset in linker script
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer
* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2
* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly
* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling
* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure
* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method
* arch: x86_64: Fix C alias of page table and GDT/IST
* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup
* arch: x86_64: Consolidate MSR definition in arch/arch.h
* arch: x86_64: Edit the way of handling GDT/IST in C into structures
* arch: x86_64: Correct the starting point of isr/irq stack
* arch: x86_64: Update up_initialize.c with the new initializing procedure
* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT
* arch: x86_64: Overhual of interrupt initialization procedure
* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]
* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure
* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug
* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot
* arch: x86_64: Correctly apply license header, comment and format code
* arch: x86_64: properly send a SIGFPE on floating point error
* arch: x86_64: Remove unused variable in up_restore_auxstate
* arch: x86_64: properly trash the processor with an infinite loop
* arch: x86_64: Fix typo in ISR handler causing ISR not handled
* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path
* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE
* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method
* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support
* arch: x86_64: update defconfigs
* arch: x86_64: rename qemu as qemu-intel64
* arch: x86_64: update Board readme
Kconfig files. Repartition some functionality. Bootloader support will need to be provided in logic under arch/z80/src/ez80 so the critical configuration selections were moved the Kconfig file there.
arch/z80/src/ez80/ez80_i2c.h: Rename arch/z80/src/ez80/ez80f91_i2c.h. It is sharable by both ez80f91 and ez80f92.
arch/z80/src/ez80/: Add logic to perform an additional level of interrupt redirection. This is necessary because the the interrupt handling is part of the loader FLASH-based logic. In order to share interrupts with the program loaded into RAM by the loader, another layer or redirection is required to get control to the interrupt handlers in the loaded program. See ez809f2_loader.asm and ez80f92_program.asm
boards/z80/ez80/z20x/scripts: Reduce size of the interrupt re-direction buffer from 1Kb to 512b.
Run all .c files modified by PR424 through nxstyle and correct most of the complaints (many long line complaints ignored for now). Update file headers to use Apache 2.0 license.
Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).
Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.
Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation
For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
The SD boot loader was not satisfactory because 1) the SD slot is on an optional board and, hence, cannot be part of a fundamental solution. And 2) it is too big.
The only storage on borard is the Winbond W25 SPI-bsed FLASH. This commit adds support for a bootload to 1) read code in HEX format from a serial port and write it to the W25 FLASH, or 2) read code in binary form from the W25 FLASH into SRAM and execute the loaded program.
boards/z80/ez80/z20x/configs: Added w25boot configuration
boards/z80/ez80/z20x/src: Add bootloader logic, w25_main.c. Add logic to manage shared SRAM memory map so that the loaded program does not clobber the bootloader memory. Add logic to recover the bootloader memory into the heap after the loaded program as started.
boards/z80/ez80/z20x/scripts: Rework scripts and configuration to support a bootloader and program build. The boolloader cannot use all of SRAM; the program must not clobber the SRAM region used by the bootloader.
* imxrt: GPIO make tables const
* imxrt: Call out to board to set up FlexRAM
* imxrt: Add Knob for adding the ROM bootloaders 40Kib of RAM to heap
* imxrt: imxrt1060-evk:Add the ability to run from OCRAM
* arch/arm/src/imxrt/imxrt_usbdev.c: Add USB Device support for i.MX RT (USB OTG1)
Based on the LPC43xx USB Device driver.
* imxrt:usbotg Nxstyle fixes
Co-authored-by: thomasactia <61285689+thomasactia@users.noreply.github.com>
board/z80/ez80/*/scripts/Make.defs: Fix optimization definition use in assembly flags. It was using the compiler optimization settings instead of the assembler optimization settings. Hence, enabling optimization would could cause assembler command line errors.
arch/z80/src/ez80/Toolchain.defs: Back out some work arounds. Now compiler optimization flags can again set set without assembler command line errors.
boards/z80/ez80/z20x/README.txt: Trivial update to size/optimization discussion.
Andrey Zabolotnyi