Commit Graph

22451 Commits

Author SHA1 Message Date
wangmingrong1 071af0c993 mm/kasan: Tag kasan and generic kasan use the same instrumentation options
1. Tested on QEMU, the two sockets were basically the same, and their performance was not affected. The size of the generated bin file was also the same
2. Extract global detection as a separate file, both types of Kasan support global variable out of bounds detection simultaneously

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-09-20 21:47:23 +08:00
wangjianyu3 b14b15ac2d nrf91: Update GPS to GNSS
Related: 03f4ec7765

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-20 14:38:43 +08:00
simbit18 6a0c0722e2 CI: Improvement to speed up compilation and reduce download errors.
The simple improvement is designed to speed up compilation and reduce download errors on github and local.

Added a folder nxtmpdir for storing third-party packages

nuttxworkspace
|
|- nuttx
|- apps
|- nxtmpdir

tools/Unix.mk:
added export NXTMPDIR := $(WSDIR)/nxtmpdir

tools/configure.sh:
added option -S creates the nxtmpdir folder for third-party packages.

tools/Config.mk:
added macro
CLONE - Git clone repository.
CHECK_COMMITSHA - Check if the branch contains the commit SHA-1.

tools/testbuild.sh:
added option -S

For now I added in the folder this package

ESP_HAL_3RDPARTY_URL = https://github.com/espressif/esp-hal-3rdparty.git

ARCH
arch/xtensa/src/esp32/Make.defs
arch/xtensa/src/esp32s2/Make.defs
arch/xtensa/src/esp32s3/Make.defs
arch/risc-v/src/common/espressif/Make.defs
arch/risc-v/src/esp32c3-legacy/Make.defs

but you can also add other packages (maybe also of apps)
2024-09-20 11:26:01 +08:00
Stuart Ianna b60a8b216b arch/risc-v/src/litex_ticked: Set initial tick count to known value.
The tick count should be manually set as there is no guarantee that the
previous boot stage hasn't modified this count since reset.
2024-09-20 10:51:45 +08:00
chao an b82717b9e6 arm/cortex-a,r: replace cp15 instruct to macros to align operation
This is continue work of https://github.com/apache/nuttx/pull/13486

Discussion here:
https://github.com/apache/nuttx/pull/13486#discussion_r1764354675

1. move cp15.h to arch public
2. replace cp15 instruct to macros to align operation
3. add memory barrier to avoid compiler optimization

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-20 09:29:57 +08:00
Petro Karashchenko f0267bc507 arch/arm/samv7: add support of SocketLIN interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-09-19 09:39:54 +08:00
hujun5 0561b55860 arm: optimize up_interrupt_context used in armv[6/7/8]-m
resson:
using percpu storage for g_current_regs or leveraging interrupt status
registers to determine if code is running within an interrupt context can enhance performance.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
hujun5 6a3a32b185 arch: move up_interrupt_context to arch specific irq.h
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
hujun5 a754c517cc irq: use per-cpu reg to replace g_current_regs
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
yinshengkai f326f15b40 sched: move DUMP_ON_EXIT to sched
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-09-19 03:49:12 +08:00
wangmingrong ae3facda53 kasan: Implementation of Kasan based on software tags.
Currently, only aarch64 is supported

Signed-off-by: wangmingrong <wangmingrong@xiaomi.com>
2024-09-19 03:15:29 +08:00
Xiang Xiao f76c2ed83b can: Add g_ prefix to can_dlc_to_len and len_to_can_dlc.
detail: Add g_ prefix to can_dlc_to_len and len_to_can_dlc to
follow NuttX coding style conventions for global symbols,
improving code readability and maintainability.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-09-18 23:50:11 +08:00
wanggang26 ae95623b8d arm_addrenv:fix app crash when enable shm in kernel mode
Hello, World!!
ap> [    2.566000] [ 1] arm_addrenv_destroy_region: listlen=1
vaddr=80000000
[    2.566000] [ 1] gran_free: granmask:0xfff, gatmask:0x10000,
gatidx:0x8, priv->gat[gatidx]:0xffffffff granno:0x110 [mem:0x48110000
free_size:0x1000]
[    2.566000] [ 1] gran_free: granmask:0xfff, gatmask:0x8000,
gatidx:0x8, priv->gat[gatidx]:0xfffeffff granno:0x10f [mem:0x4810f000
free_size:0x1000]
[    2.567000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80100000
[    2.567000] [ 1] gran_free: granmask:0xfff, gatmask:0x40000,
gatidx:0x8, priv->gat[gatidx]:0xfffe7fff granno:0x112 [mem:0x48112000
free_size:0x1000]
[    2.567000] [ 1] gran_free: granmask:0xfff, gatmask:0x20000,
gatidx:0x8, priv->gat[gatidx]:0xfffa7fff granno:0x111 [mem:0x48111000
free_size:0x1000]
[    2.568000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80200000
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x100000,
gatidx:0x8, priv->gat[gatidx]:0xfff87fff granno:0x114 [mem:0x48114000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x200000,
gatidx:0x8, priv->gat[gatidx]:0xffe87fff granno:0x115 [mem:0x48115000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x400000,
gatidx:0x8, priv->gat[gatidx]:0xffc87fff granno:0x116 [mem:0x48116000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x800000,
gatidx:0x8, priv->gat[gatidx]:0xff887fff granno:0x117 [mem:0x48117000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x1000000,
gatidx:0x8, priv->gat[gatidx]:0xff087fff granno:0x118 [mem:0x48118000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x2000000,
gatidx:0x8, priv->gat[gatidx]:0xfe087fff granno:0x119 [mem:0x48119000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x4000000,
gatidx:0x8, priv->gat[gatidx]:0xfc087fff granno:0x11a [mem:0x4811a000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x8000000,
gatidx:0x8, priv->gat[gatidx]:0xf8087fff granno:0x11b [mem:0x4811b000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x10000000,
gatidx:0x8, priv->gat[gatidx]:0xf0087fff granno:0x11c [mem:0x4811c000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x20000000,
gatidx:0x8, priv->gat[gatidx]:0xe0087fff granno:0x11d [mem:0x4811d000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x40000000,
gatidx:0x8, priv->gat[gatidx]:0xc0087fff granno:0x11e [mem:0x4811e000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000000,
gatidx:0x8, priv->gat[gatidx]:0x80087fff granno:0x11f [mem:0x4811f000
free_size:0x1000]
[    2.574000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000,
gatidx:0x8, priv->gat[gatidx]:0x87fff granno:0x113 [mem:0x48113000
free_size:0x1000]
[    2.574000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80300000
[    2.574000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000,
gatidx:0x8, priv->gat[gatidx]:0x7fff granno:0x113 [mem:0x48113000
free_size:0x1000]
[    2.575000] [ 1] _assert: Current Version: NuttX  0.0.0
fa1e301238-dirty Apr 16 2024 23:18:10 arm
[    2.575000] [ 1] _assert: Assertion failed : at file:
mm_gran/mm_granfree.c:131 task: lpwork process: Kernel 0x602769

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 15:26:42 -03:00
Huang Qi 6695affe87 risc-v: Add a new option to control exception reason
The number of exception for risc-v is 16 (0 ~ 15)
for the machine ISA version 1.12 or earlier, the number of exception is 20
(0 ~ 19) from the ISA version 1.13. And maybe changed in the future.

Using a dedicated option to control the exception number to allow the earlier
version chip with customized exception number (e.g. 16 ~ 19 used) to define
the exception reason string correctly.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-09-17 15:26:06 -03:00
simbit18 583f025422 Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
2024-09-17 22:16:41 +08:00
SPRESENSE 237087f61a arch: cxd56xx: Fix issue by update of inode reference
Fix an issue of driver open failure caused by the following commit
that changes the initial value of inode reference.

43d0d95f81 fs/inode: using inode reference to indicate unlink and simply code
2024-09-17 20:13:15 +08:00
wanggang26 a6c3de6e89 goldfish:add kernel mode support
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 20:10:13 +08:00
wanggang26 02287a2976 shm:fix build error
after enable both CONFIG_BUILD_KERNEL and CONFIG_ARCH_VMA_MAPPING
arch.h:141:18: error: 'ARCH_SHM_MAXPAGES' undeclared here

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 20:09:39 +08:00
p-szafonimateusz 92cbb63fc8 arch/x86_64: add basic support for R_X86_64_REX_GOTPCRELX relocation
GOTPCRELX reloc available only for CONFIG_ARCH_ADDRENV=y

when CONFIG_ARCH_ADDRENV is not set, CONFIG_ARCH_TEXT_VBASE is not specified
so we can't relocate

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-17 03:20:03 +08:00
hujun5 c16fd8c911 gicv2:g_gic_init_done need to be protect
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-16 10:30:41 +08:00
ligd cd88cb1e48 armv7-a/r: check gic init wait done when using sgi
In SMP mode, qemu/goldfish platform, cpu0 use up_cpu_start()
to start others cpus.

But in previous patch(mathion ahead), arm_gic_initialize() will
wait others cpus start, so deadlocked!

Resolve:
Move the wait logic when use using sgi

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-16 10:30:41 +08:00
Bowen Wang 4f5b3f3d82 arm_gicv2: always enable GIC_ICCICRS_ACKTCTL
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-16 10:30:41 +08:00
Bowen Wang 7f0ab52b12 arm_gicv2: cpu 0 wait other cpu gic init done
After move the SGI irq to group1, other cpu can't response the
sgi request from cpu0 when its gic not initialized.
So let cpu0 wait until all other cpus gic initialize done.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-16 10:30:41 +08:00
ligd 4358eba13a armv7-a/r: export __start symbol
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-16 10:30:41 +08:00
ligd 07b55cf7ab armv7-a/r: set up_cpu_start() to wakefunction
cause some platform will have their special way

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-16 10:30:41 +08:00
Masayuki Ishikawa df298c186f Revert "build depend:Revert Make.dep intermediate ddc file"
This reverts commit ddc3119c4e.
2024-09-15 19:29:47 +08:00
wanggang26 2c24e5b430 arch/arm-m: Clear lr before jump to __start
to fix issue about https://github.com/apache/nuttx/issues/12687

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-15 17:31:12 +08:00
Kevin Zhou d6ae4a0342 xtensa/esp32s3: Adjust I2C clock timing 2024-09-15 10:23:19 +08:00
xuxin19 ddc3119c4e build depend:Revert Make.dep intermediate ddc file
Revert "Parallelize depend file generation"
This reverts commit d5b6ec450f.

parallel depend ddc does not significantly speed up compilation,
intermediately generated .ddc files can cause problems if compilation is interrupted unexpectedly

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:01:58 +08:00
xuxin19 ab488800bb cmake:enhance the module for adding extra libraries
change the extra library from a file to an import target;
this will avoid differences in the handling of static libraries
between different versions of cmake and different platforms.

after unifying as a target, extra libraries can be
handled as the same as other compiled libraries

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:01:07 +08:00
p-szafonimateusz 2890232f3d arch/intel64: add support for PCI serial
intel64 can work with PCI serial cards now

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz ceb2921d79 drivers: prepare 16550 UART driver to support PCI
prepare 16550 UART driver to support PCI:

- [breaking change] change argument of uart_ioctl() from `struct file *filep` to `FAR struct u16550_s *priv`
  Also fix moxart_16550.c build related to this change

- [breaking change] change argument of uart_getreg() and uart_putreg from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
  Also fix arch/x86/src/qemu/qemu_serial.c and arch/x86_64/src/intel64/intel64_serial.c related to this change

- [breaking change] change argument of uart_dmachan() from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`

- move `struct u16550_s` to public header

- generalize UART_XXX_OFFSET so we can use it with any register increment

- make u16550_bind(), u16550_interrupt(), u16550_interrupt() public

- remove arch/or1k/src/common/or1k_uart.c and use common 16550 MIMO interfacve

- change irq type in `struct u16550_s` from uint8_t to int to match MSI API

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz a0e00b993a intel64: register PCI controller early but postpone PCI drivers init
Some of PCI drivers require OS interfaces that can't be executed in the INIT context.
In that case we have to postpone PCI drivers probing and call it for example
in board initialization logic.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
wangyongrong ff399054c1 rptun/rpmsg_virtio: fix addrenv/raddrenv num error
Buf fix, simple_addrenv assume the last addrenv in addrenv array
be zero value

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-14 17:34:52 +08:00
wangyongrong 842486ff52 sim_rptun/rpmsg_virtio: Replace work queue with wdog
Wdog has better performance than work queue

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-14 17:34:52 +08:00
yintao 30fd12c687 sim/sim_rptun.c: Fixed data type for sim_rptun_shmem_s
Use fixed length data type for the struct shared in cross-core
communication

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-14 17:34:52 +08:00
yintao 5a04670600 sim/sim_rptun: Check if the shared memory has been allocated
Bug fix

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-14 17:34:52 +08:00
yintao 4f14f8226a sim/sim_rptun: Support master/slave notifies opposite side when recovery
When in a multi-core structure, as the intermediate core,
remote is both the master and slave;When the remote exception or
restart occurs, it needs to notify the slave and reestablish the connection

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-14 17:34:52 +08:00
Yongrong Wang a20cc9f04c sim rpmsg virtio: add sim rpmsg virtio support
add sim_rpmsg_virtio.c to verify the new rpmsg virtio wrapper layer,
new the rpmsg virtio can be used in sim platfrom

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-09-14 17:34:52 +08:00
ouyangxiangzhen 733a68002c arch/riscv: Fixed hardware timer warps-around issue
This commit fixed the issue where the hardware timer wraps around and causes the system to halt.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-14 00:07:13 +08:00
hujun5 908df725ad arch: use up_current_regs/up_set_current_regs replace CURRENT_REGS
reason:
1 On different architectures, we can utilize more optimized strategies
  to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.

code size
before
    text    data     bss     dec     hex filename
 262848   49985   63893  376726   5bf96 nuttx

after
       text    data     bss     dec     hex filename
 262844   49985   63893  376722   5bf92 nuttx

size change -4

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
   -machine virt,virtualization=on,gic-version=3 \
   -net none -chardev stdio,id=con,mux=on -serial chardev:con \
   -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-13 23:18:58 +08:00
ligd 72bdc9d9b4 armv7/8-m: change enter_critical_section to up_irq_save
caused critical_monitor will gettime, that will caused
enter_critical_seciton recursive

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-13 23:08:00 +08:00
ligd 32f56c3c62 armv8m: support busfault forward to TEE in REE handler mode
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-13 23:08:00 +08:00
ouyangxiangzhen cb7894d644 arch/x86_64: Add ARCH_INTEL64_DISABLE_CET
Intel CET (Control-flow Enforcement Technology) is a hardware enhancement aimed at mitigating the Retpoline vulnerability, but it may impact CPU branch prediction performance. This commit added ARCH_INTEL64_DISABLE_CET, which can disable CET completely with compilation option `-fcf-protection=none`.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-13 17:01:24 +02:00
ouyangxiangzhen 126221df97 arch/x86_64: Add elf32 multiboot1 wrapper for NuttX binary
It was discovered that attempting to load x86-64 format ELF files with a multiboot1 header using the qemu `-kernel` command would result in an error, as multiboot1 only allows x86-32 format ELF files. To address this limitation, we have developed a simple x86_32 bootloader. This bootloader is designed to copy the `nuttx.bin` file to the designated memory address (`0x100000`) and then transfer control to NuttX by executing a jump instruction (`jmp 0x100000`).

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-09-13 21:25:51 +08:00
p-szafonimateusz 2b1da40832 arch/x86_64/intel64: fix compilation errors in intel64_oneshot_lower.c
clock_time2ticks and clock_ticks2time macros changes but this file was not update

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 21:24:39 +08:00
p-szafonimateusz d6a6a0a7cc arch/intel64/hpet: add FSB interrupts support and support for 32-bit mode
These are changes to make HPET work with ACRN hypervisor:

- FSB interrupt delivery (which works like PCI MSI)
- 32-bit mode support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:28:08 -03:00
Jukka Laitinen 78d2d884d3 arch/arm64/src/imx9/imx9_lpi2c.c: Ignore spurious RX interrupts
Check remaining data count, just in case an extra RX interrupt occurs
after receiving a message

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-09-13 09:18:30 -03:00
p-szafonimateusz 0659b333b4 arch/x86_64/intel64: add MSI/MSI-X support
Add MSI and MSI-X support for intel64

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:42:08 +08:00
liaoao 512a496467 riscv_mtimer: modify riscv_mtimer_current to reduce precision lost
Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-13 08:55:00 +08:00