c494ce4a96
Update kconfig2html.c
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Fix nuttx coding style
2023-12-14 20:02:52 -08:00
882afc885e
channel gain switching in aefc by ioctl
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Update arch/arm/include/samv7/sam_afec.h
remove "offset may be uninitialized" warning
Update arch/arm/include/samv7/sam_afec.h
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Update arch/arm/include/samv7/sam_afec.h
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Update arch/arm/src/samv7/sam_afec.c
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Update arch/arm/src/samv7/sam_afec.c
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Update arch/arm/include/samv7/sam_afec.h
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Update arch/arm/include/samv7/sam_afec.h
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
remove blank line
2023-10-16 21:55:40 +08:00
03e5c0217b
samv7: allow usage of QSPI in SPI mode for all MCUs
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Current implementation of QSPI in SPI mode was available only for MCUs
that do not have standard SPI at all. MCUs with both QSPI and SPI can
however also use QSPI in SPI mode and thus have one more SPI bus. This
commit adds required defines and config options to support QSPI in SPI
mode for all SAMv7 MCUs.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-08-28 17:39:51 +03:00
4b190fbce1
arch/arm/samv7: correct number on interrupts
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:22 +08:00
134b2e6ec9
arch/arm/include/samv7: fix typo in samv7 irq header files
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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-11-26 14:55:34 -03:00
a64903acc7
samv7: adds support for QSPI driver in SPI Mode
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This commit adds new files that support functionality of QSPI driver in
SPI Master Mode. This functionality is included in new files sam_qspi_spi.x
to avoid too much mess in the source code. QSPI in SPI mode can be turn
on by config option SAMV7_QSPI_SPI_MODE.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-10-30 01:24:31 -05:00
c39339a7a8
arch: arm: include: nxstyle fixes
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nxstyle fixes to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
4daa276903
arch: arm: include: Author Gregory Nutt: update licenses to Apache
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Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
679b4fbee2
arch: Fix included directed -> included directly
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This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
d0cda60442
In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
2018-12-03 17:41:59 -06:00
cb374e6e62
arch/: Clean up some naming and spacing.
2018-06-20 15:38:06 -06:00
1cdc746726
Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES
2016-06-11 14:14:08 -06:00
83bc1c97c3
Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
2016-02-14 16:11:25 -06:00
f4115ab45c
Correct LPC11xx priority definitions + fix some typos in comments
2016-01-25 07:36:26 -06:00
6a9876f960
SAMV7: Add an untested RSWDT driver
2015-12-06 09:56:45 -06:00
0add2b8910
arch/arm/include/samv7: Add support for the SAME70 family
2015-11-14 11:36:21 -06:00
36726b1bc4
Standardize the width of all comment boxes in header files
2015-10-02 17:42:29 -06:00
348060f5d2
SAMV7: Add QSPI Register Definition Header File
2015-08-14 18:11:01 -06:00
f986d08515
SAMV71: Fix error in GPIO interrupt numbering
2015-08-05 08:57:05 -06:00
cf8f8b8c4a
SAMV6 USB updates
2015-03-26 09:49:01 -06:00
a590bdc737
SAMV7: Quick'n'dirty port of the SAMA5D4 Ethernet MAC driver to the SAMV7. Still some unresovled issues with DCache handling
2015-03-16 13:51:37 -06:00
8f59fc8f64
SAMV7: Quick'n'dirty port of the SAMA5 HSMCI driver to the SAMV7
2015-03-12 18:03:41 -06:00
0d79e315fd
SAMV71: Quick'n'dirty port of the SAMA5 SSC driver to the SAM7. The IP is compatible but there are still some DMA- and Cache-related issues that need to be worked out.
2015-03-12 16:00:38 -06:00
9b6c7661a4
SAMV7: Add TWI/I2C driver (untested)
2015-03-12 10:58:11 -06:00
f696530485
SAMV7: Add GPIO interrupt support
2015-03-08 19:32:05 -06:00
2571d6202d
SAMV71-XULT: Add heap allocation logic
2015-03-07 11:46:54 -06:00
7113de4d18
SAMV71: Add PMC register definition header files
2015-03-06 14:58:13 -06:00
89fd098a20
SAMV7: Add SAMV71 peripheral IDs and interrupt vector definitions
2015-03-05 16:34:22 -06:00
67c21e6817
SAMV7 Kconfig: Add peripheral selections
2015-03-05 13:51:39 -06:00
02e613b277
Add basic build directories and configuration logic for the SAMV7 family
2015-03-05 10:00:24 -06:00
simbit18