Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This change implements a driver for the two watchdog timers on the BL808, and enables it as part of the timer config. The driver is based on the GP timer driver.
This commit implements a character driver for the general purpose ADC of the BL808, based on the hardware scanning functionality. The driver supports setting different conversion resolutions and the order of channels to be scanned via menuconfig.
- This PR adds the LED Driver for Ox64 Board (User LEDs and Auto LEDs)
- Ox64 LED Driver will be used by the Rust Blinky App for Google Summer of Code
- User LED 1 is configured for GPIO 29. Other User LEDs and Auto LEDs shall be configured by the NuttX Dev.
- The code is derived from NuttX PinePhone LED Driver
This commit modifies the existing serial driver to add support for the remaining UARTs on the BL808. It also introduces support for setting baud rate, character length, stop bits, parity, flow control and which serial port acts as the console.
This change implements a system for allowing the D0 core (which runs NuttX) to receive forwarded interrupts from the M0 core. This makes it possible for drivers that rely on interrupts to work with peripherals attached to the M0 core.
It is misleading to allocate stack from static array and heap,
make all stack allocated from heap area.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Ox64 BL808 crashes with a Page Fault when we run `getprime` then `hello`. This is caused by the T-Head C906 MMU incorrectly accessing the MMU Page Tables of the Previous Process (`getprime`) while starting the New Process (`hello`).
To fix the problem, this PR flushes the MMU Cache whenever we point the MMU SATP Register to the New Page Tables. We execute 2 RISC-V Instructions that are specific to T-Head C906:
- DCACHE.IALL: Invalidate all Page Table Entries in the D-Cache
- SYNC.S: Ensure that all Cache Operations are completed
This is derived from the T-Head Errata for Linux Kernel. More details here: https://lupyuen.github.io/articles/mmu#appendix-flush-the-mmu-cache-for-t-head-c906
Modified Files:
- `arch/risc-v/src/common/riscv_mmu.h`: If needed, `mmu_write_satp()` calls `mmu_flush_cache()` (weak function) to flush the MMU Cache. (Like for T-Head C906)
- `arch/risc-v/src/bl808/bl808_mm_init.c`: Flush the MMU Cache for T-Head C906. Extend `mmuflags` from 32-bit to 64-bit to be consistent with `mmu_ln_setentry()`.
- `boards/risc-v/bl808/ox64/configs/nsh/defconfig`: Enable `ostest` in the Build Config. Update `CONFIG_BOARD_LOOPSPERMSEC` according to `calib_udelay`.
This PR adds support for PINE64 Ox64 64-bit RISC-V SBC, based on Bouffalo Lab BL808 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Star64 JH7110. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-ox64
### Modified Files
`boards/Kconfig`: Added Ox64 board
### New Files in boards/risc-v/bl808/ox64
`src/bl808_appinit.c`: Startup Code
`include/board.h`: Ox64 Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Ox64 Makefile
`src/Makefile`: Ox64 Makefile
`Kconfig`: Ox64 Config
`configs/nsh/defconfig`: Build Config for `ox64:nsh`
### Updated Documentation
`platforms/risc-v/bl808/index.rst`: New page for Bouffalo Lab BL808 SoC
`platforms/risc-v/bl808/boards/ox64/index.rst`: Building and booting NuttX for Ox64
`platforms/risc-v/jh7110/boards/star64/index.rst`: Fix typo
Alin Jerpelea