Commit Graph

49015 Commits

Author SHA1 Message Date
Tiago Medicci Serrano b6e92fa16d esp32s3/wifi: call softAP callback when Wi-Fi driver TX is done
In one of the previous code revision, the '#ifdef' for calling the
softAP callback was thrown away.
2023-04-06 20:58:58 +03:00
Dong Heng a51e102a41 xtensa/esp32: Make asprintf and lib_free corresponding 2023-04-06 20:57:19 +03:00
Tiago Medicci Serrano 00c3463426 arch/xtensa: Remove FAR qualifier for Xtensa-specific files
This PR intends to remove all references to the FAR qualifier from
Xtensa files. FAR is defined as nothing on both architectures.
2023-04-06 14:36:26 -03:00
Gustavo Henrique Nihei 38861f6154 risc-v/espressif: Use spinlock APIs for defining critical sections
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-06 14:35:36 -03:00
raiden00pl d356ad633f {stm32,stm32f7,stm32h7,stm32l4,efm32}/otg: rasie an assertion if IN request is not possible to transfer
Otherwise, a request will never be transferred and there is no
information to the user that something is wrong.
For example, when using default values for TXFIFO in HS mode,
USBMSC will never work because the maximum request len is 512B
which is lower than the default TXFIFO size for IN EP.
2023-04-06 19:30:53 +03:00
Gustavo Henrique Nihei 9affcb8673 boards: Update tickless defconfigs with ostest for testability
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-06 19:29:23 +03:00
Gustavo Henrique Nihei ac746fd87f risc-v/espressif: Add support for Tickless mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-06 19:29:23 +03:00
raiden00pl 62ff3f484e {stm32f7,stm32h7,stm32l4}/sdmmc: callback support requires HPWORK 2023-04-06 18:10:59 +03:00
pengyiqiang 961b86642a sim_x11eventloop: fix X11 event accumulation
sim_x11events should process all x11 events in each event loop,
otherwise it will cause events to accumulate in the queue and affect the interaction.

Signed-off-by: pengyiqiang <pengyiqiang@xiaomi.com>
2023-04-06 10:24:17 -03:00
Xiang Xiao b2c8b5f674 board: define boardioc_softreset_subreason_e in CONFIG_BOARDCTL_RESET
so user could pass boardioc_softreset_subreason_e to board_reset too

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-06 12:44:50 +03:00
Masayuki Ishikawa 5e7d48f4b0 arch: k210: Fix k210 timer on QEMU 6.1 or later
Summary:
- I noticed that 'sleep 1' on nsh took 10 seconds on QEMU-6.1,
  though the old version (e.g. QEMU-5.2) works correctly.
- I think we should implement PLL for the QEMU environment.
  However, this fix works as a tentative solution.

Impact:
- K210 on QEMU only

Tested
- Tested with QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-04-06 00:54:08 -07:00
Gustavo Henrique Nihei 8be8aab9bb risc-v/espressif: Panic if CPU interrupt allocation fails
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-05 16:52:07 -03:00
Gustavo Henrique Nihei 7aecd751f0 risc-v/espressif: Add support for Oneshot Timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-05 16:51:34 -03:00
Gustavo Henrique Nihei 31d68f2dd3 risc-v/espressif: Add support for Periodic Timers
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-05 16:51:34 -03:00
raiden00pl 1ace09cf10 stm32h7/otgdev: FS transceiver must be enabled if OTGFS enabled 2023-04-05 13:34:09 -03:00
Tiago Medicci Serrano 89b966a4f5 esp32/wifi: notify networking layer about the carrier status 2023-04-05 10:26:27 -03:00
Tiago Medicci Serrano eb01b66978 esp32/wifi: fix typos, goto and macro definitions 2023-04-05 10:26:27 -03:00
Tiago Medicci Serrano 49d43a35b9 esp32/wifi: set Wi-Fi driver parameters only when needed
This commit fixes #7857 and #7193 by saving Wi-Fi parameters and
set them at once, avoiding unknown behaviors of the Wi-Fi driver.

This commit also enables setting the auth of the STA/softAP modes
while connecting to/providing the wireless network.
2023-04-05 10:26:27 -03:00
Fotis Panagiotopoulos 95af4b35cf Fixed improper access of g_pidhash. 2023-04-04 18:00:36 -06:00
raiden00pl 553fe83abf boards: refresh boards that use usbmsc 2023-04-04 14:45:23 -04:00
raiden00pl 83cdaeb593 stm32h7/otg: add support for external ULPI 2023-04-04 09:25:00 -07:00
raiden00pl f89d2be99f stm32h7/rcc: OTGHS ULPI works only in VOS0
This is not documented by ST at all but otherwise ULPI is dead.
2023-04-04 09:25:00 -07:00
raiden00pl d76b7c20ad stm32h7: update ULPI pins 2023-04-04 09:25:00 -07:00
Xiang Xiao 84ddfb5455 sched/assert: Simplify the fatal detection logic
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-04 11:29:10 -04:00
chao an 4fbf5f7a4b libs/libc: correct config define of arch functions
Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-04 09:37:46 -03:00
Xiang Xiao d3f659b854 boardctl.h: Add BOARDIOC_SOFTRESETCAUSE_ENTER_BOOTLOADER reset cause
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-03 14:50:44 -04:00
Xiang Xiao b43ca9fcdb boardctl.h: Move BOARDIOC_SOFTRESETCAUSE_[PANIC|ASSERT] to the last
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-03 14:50:44 -04:00
Xiang Xiao 12fda1da1c boards: Replace open/pread with file_open/file_pread
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-03 16:18:37 +03:00
yinshengkai cafd3af160 arch/boards: fix stm32f411-mininum:nsh compilation failure after enabling IRQMONITOR 2023-04-03 09:05:21 +02:00
Gregory Nutt 758e88672b Assert if a thread attempts to post a semaphore incorrectly.
Assert in nxsem_post if:

- Priority inheritance is enabled on a semaphore
- A thread that does not hold the semaphore attempts to post it

This will detect an error condition described in https://cwiki.apache.org/confluence/display/NUTTX/Signaling+Semaphores+and+Priority+Inheritance

None.  The debug instrumentation is only enabled if CONFIG_DEBUG_ASSERTIONS is enabled.

Use sim:ostest.  Verify that no assertions occur.
2023-04-03 09:03:15 +02:00
Lwazi Dube 4ff4562401 tm4c1294-launchpad: Use bmi160 driver for boostxl-sensors.
Use the preexisting bmi160 driver for the boostxl-sensors
boosterpack. Add macros to allow the bluetooth module to be
used with UART6.
2023-04-03 09:02:34 +02:00
raiden00pl 71d7028c4a stm32h7/stm32_sdmmc.c: fix compilation 2023-04-02 17:20:17 -04:00
Huang Qi 7f27129896 tools: Move Rust relative settings to Rust.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-04-01 16:45:11 +03:00
Gustavo Henrique Nihei ffef83c9a1 risc-v/espressif: Add High Resolution Timer driver
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-04-01 10:40:04 -03:00
GD32-MCU 6a799fef6c add littlefs support for gd32f450zk-eval board 2023-04-01 10:38:16 -03:00
Huang Qi 2650fa9509 tools/Zig: Simplify compile flags handling
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-31 16:55:15 -03:00
Huang Qi bd14175de4 boards/sim: Export LLVM style arch info
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-31 16:55:15 -03:00
Huang Qi 5d4e4b1919 tools/riscv: Map extensions to certain cpu model for LLVM based toolchain
RISCV has a modular instruction set. It's hard to define cpu-model to support all toolchain.
For Zig, cpu model is this formal: generic_rv[32|64][i][m][a][f][d][c]
For Rust, cpu model is this formal: riscv[32|64][i][m][a][f][d][c]
So, it's better to map the NuttX config to LLVM builtin cpu model, these models supported by
all LLVM based toolchain.
Refer to : https://github.com/llvm/llvm-project/blob/release/15.x/llvm/lib/Target/RISCV/RISCV.td
These models can't cover all implementation of RISCV, but it's enough for most cases.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-31 16:55:15 -03:00
Gustavo Henrique Nihei 5081cef2c9 risc-v/espressif: Add Hardware RNG support
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-31 22:01:39 +03:00
Gustavo Henrique Nihei cf90fa62b2 risc-v/espressif: Add support for System Reset
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-31 22:00:17 +03:00
Gustavo Henrique Nihei c1efa8c85a risc-v/espressif: Fix include path for brownout.h
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-31 22:00:17 +03:00
chao an 3c58f5db2b syscall/libc: add more syscall/libc symbols into csv file
Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-31 21:56:50 +09:00
raiden00pl 478f2f3d5f rndis: move private definitions from a public header to the source file 2023-03-31 08:17:01 +09:00
raiden00pl 58e817db76 rndis: do not configure endpoints from Kconfig when composite enabled
This should be done from a board specific logic, as for other composite devices
2023-03-31 08:17:01 +09:00
Alan Carvalho de Assis 498a24cc54 esp32s3: Add esp32s3-meadow board 2023-03-30 20:35:15 +03:00
yinshengkai 700fd265ee sched: fix compile error when SCHED_CRITMONITOR is enabled
Compilation error occurs after SCHED_CRITMONITOR is enabled
sched/sched_critmonitor.c:315: undefined reference to `serr'

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-03-30 09:29:37 -03:00
raiden00pl b6397cd8d6 nrf52840-dk: add usbdev examples 2023-03-30 09:28:55 -03:00
raiden00pl 9bd865301c nrf52: add usb support 2023-03-30 09:28:55 -03:00
Ville Juven f468371332 sched/sem_waitirq: Swap user mappings to MMU when releasing semaphore
sem_t is user memory and the correct mappings are needed to perform
the semaphore wait interruption.

Otherwise either a page fault, or access to the WRONG address environment
happens.
2023-03-29 10:53:09 -03:00
Ville Juven fc44cbdbdb arch/risc-v: Set Supervisor User Memory (access) for idle process too
This has been a long issue for me as it results in random crashes when
asynchronous events occur when the idle process is active.

The problem is that the kernel cannot access user memory, because the CPU
status prevents it.
2023-03-29 10:53:09 -03:00