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Improved description of CONFIG_ARMV7M_USEBASEPRI from Vijay Kumar

This commit is contained in:
Gregory Nutt 2014-03-19 07:16:44 -06:00
parent fd3318a05e
commit f713b4937c
1 changed files with 7 additions and 5 deletions
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12
arch/arm/Kconfig
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@ -248,11 +248,13 @@ config ARMV7M_USEBASEPRI
default n
depends on ARCH_CORTEXM3 || ARCH_CORTEXM4
---help---
Use the BASEPRI register to enable and disable able interrupts. By
default, the PRIMASK register is used for this purpose. This
usually results in hardfaults that are properly handling by the
RTOS. Using the BASEPRI register will avoid these hardfault.
That is needed primarily for integration with some toolchains.
Use the BASEPRI register to enable and disable interrupts. By
default, the PRIMASK register is used for this purpose. This
usually results in hardfaults when supervisor calls are made.
Though, these hardfaults are properly handled by the RTOS, the
hardfaults can confuse some debuggers. With the BASEPRI
register, these hardfaults, will be avoided. For more details see
http://www.nuttx.org/doku.php?id=wiki:nxinternal:svcall
config ARCH_HAVE_CMNVECTOR
bool