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xtensa/esp32: Fix SPI bugs 

1. Fix SPI master/slave clock init/deinit error
2. Fix SPI slave RX process error
This commit is contained in:
Dong Heng 2023-01-16 14:52:05 +08:00 committed by Xiang Xiao
parent acd108a5ed
commit f35f32d4ee
2 changed files with 12 additions and 5 deletions
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5
arch/xtensa/src/esp32/esp32_spi.c
View File

@ -834,7 +834,7 @@ static void esp32_spi_dma_exchange(struct esp32_spi_priv_s *priv,
struct esp32_dmadesc_s *dma_tx_desc;
struct esp32_dmadesc_s *dma_rx_desc;
#ifdef CONFIG_XTENSA_IMEM_USE_SEPARATE_HEAP
uint8_t *alloctp;
uint8_t *alloctp = NULL;
uint8_t *allocrp;
#endif
@ -1419,10 +1419,11 @@ static void esp32_spi_deinit(struct spi_dev_s *dev)
if (priv->config->use_dma)
{
modifyreg32(DPORT_PERIP_RST_EN_REG, 0, priv->config->dma_rst_bit);
modifyreg32(DPORT_PERIP_CLK_EN_REG, priv->config->dma_clk_bit, 0);
}
modifyreg32(DPORT_PERIP_RST_EN_REG, 0, priv->config->clk_bit);
modifyreg32(DPORT_PERIP_RST_EN_REG, 0, priv->config->rst_bit);
modifyreg32(DPORT_PERIP_CLK_EN_REG, priv->config->clk_bit, 0);
priv->frequency = 0;

12
arch/xtensa/src/esp32/esp32_spi_slave.c
View File

@ -830,8 +830,6 @@ static int esp32_spislv_interrupt(int irq, void *context, void *arg)
n = (esp32_spi_get_reg(priv, SPI_SLV_RD_BIT_OFFSET) + 1) / 8;
esp32_spi_set_regbits(priv, SPI_USER_OFFSET, SPI_USR_MOSI_M);
/* RX process */
if (!priv->dma_chan)
@ -843,7 +841,7 @@ static int esp32_spislv_interrupt(int irq, void *context, void *arg)
for (i = 0; i < n; i += 4)
{
tmp = esp32_spi_get_reg(priv, SPI_W0_OFFSET + i);
memcpy(priv->rxbuffer + priv->rxlen + i, &tmp, n);
memcpy(priv->rxbuffer + priv->rxlen + i, &tmp, 4);
}
}
@ -879,6 +877,8 @@ static int esp32_spislv_interrupt(int irq, void *context, void *arg)
{
priv->process = false;
SPIS_DEV_SELECT(priv->dev, false);
esp32_spi_reset_regbits(priv, SPI_SLAVE_OFFSET, SPI_TRANS_DONE_M);
}
return 0;
@ -1052,6 +1052,12 @@ static void esp32_spislv_deinit(struct spi_slave_ctrlr_s *ctrlr)
esp32_gpioirqdisable(ESP32_PIN2IRQ(priv->config->cs_pin));
esp32_spi_reset_regbits(priv, SPI_SLAVE_OFFSET, SPI_INT_EN_M);
if (priv->dma_chan)
{
modifyreg32(DPORT_PERIP_RST_EN_REG, 0, priv->config->dma_rst_bit);
modifyreg32(DPORT_PERIP_CLK_EN_REG, priv->config->dma_clk_bit, 0);
}
modifyreg32(DPORT_PERIP_RST_EN_REG, 0, priv->config->clk_bit);
modifyreg32(DPORT_PERIP_CLK_EN_REG, priv->config->clk_bit, 0);