diff --git a/arch/z16/src/common/z16_registerdump.c b/arch/z16/src/common/z16_registerdump.c
index 33c2a2b641..258c47d722 100644
--- a/arch/z16/src/common/z16_registerdump.c
+++ b/arch/z16/src/common/z16_registerdump.c
@@ -49,7 +49,7 @@ uintptr_t up_getusrsp(void)
 void up_dump_register(FAR void *dumpregs)
 {
 #ifdef CONFIG_DEBUG_INFO
-  FAR uint32_t *regs = dumpregs ? dumpregs : g_current_regs;
+  FAR volatile uint32_t *regs = dumpregs ? dumpregs : g_current_regs;
 
   _alert("R0 :%08x R1 :%08x R2 :%08x R3 :%08x "
          "R4 :%08x R5 :%08x R6 :%08x R7 :%08x\n"
diff --git a/arch/z80/src/ez80/ez80_registerdump.c b/arch/z80/src/ez80/ez80_registerdump.c
index fb958f69e5..6196bdba97 100644
--- a/arch/z80/src/ez80/ez80_registerdump.c
+++ b/arch/z80/src/ez80/ez80_registerdump.c
@@ -52,7 +52,7 @@ uintptr_t up_getusrsp(void)
 
 void up_dump_register(FAR void *dumpregs)
 {
-  FAR chipreg_t *regs = dumpregs ? dumpregs : g_current_regs;
+  FAR volatile chipreg_t *regs = dumpregs ? dumpregs : g_current_regs;
 
 #ifdef CONFIG_EZ80_Z80MODE
   _alert("AF: %04x  I: %04x\n",
diff --git a/arch/z80/src/z180/z180_registerdump.c b/arch/z80/src/z180/z180_registerdump.c
index a76d83a8ef..1ec697ca67 100644
--- a/arch/z80/src/z180/z180_registerdump.c
+++ b/arch/z80/src/z180/z180_registerdump.c
@@ -52,7 +52,7 @@ uintptr_t up_getusrsp(void)
 
 void up_dump_register(FAR void *dumpregs)
 {
-  FAR chipreg_t *regs = dumpregs ? dumpregs : g_current_regs;
+  FAR volatile chipreg_t *regs = dumpregs ? dumpregs : g_current_regs;
 
   _alert("AF: %04x  I: %04x\n",
          regs[XCPT_AF], regs[XCPT_I]);
diff --git a/arch/z80/src/z80/z80_registerdump.c b/arch/z80/src/z80/z80_registerdump.c
index 3357420c7d..c1f0d4097c 100644
--- a/arch/z80/src/z80/z80_registerdump.c
+++ b/arch/z80/src/z80/z80_registerdump.c
@@ -52,7 +52,7 @@ uintptr_t up_getusrsp(void)
 
 void up_dump_register(FAR void *dumpregs)
 {
-  FAR chipreg_t *regs = dumpregs ? dumpregs : g_current_regs;
+  FAR volatile chipreg_t *regs = dumpregs ? dumpregs : g_current_regs;
 
   _alert("AF: %04x  I: %04x\n",
          regs[XCPT_AF], regs[XCPT_I]);