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Use r6, not r2 when passing paramters with call4

This commit is contained in:
Gregory Nutt 2016-12-16 09:21:44 -06:00
parent 41cf32a20e
commit f1a5b91cd8
4 changed files with 25 additions and 12 deletions
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9
arch/xtensa/src/common/xtensa_int_handlers.S
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@ -158,10 +158,11 @@
* area as a parameter (A2).
*/
mov a2, a12 /* Argument: Top of stack = register save area */
#ifdef __XTENSA_CALL0_ABI__
mov a2, a12 /* Argument: Top of stack = register save area */
call0 xtensa_int_decode /* Call xtensa_int_decode */
#else
mov a6, a12 /* Argument: Top of stack = register save area */
call4 xtensa_int_decode /* Call xtensa_int_decode */
#endif
@ -193,14 +194,16 @@
*
* REVISIT: Here we explicitly assume that the INTERRUPT XT_TIMER_INTEN
* corresponds to TIMER0. That is probably that case, but not necessarily
* so.
* so. xtensa_timer.h should probably select the IRQ number as well.
*/
#ifdef __XTENSA_CALL0_ABI__
movi a2, XTENSA_IRQ_TIMER0 /* Argument 1: Timer0 IRQ number */
mov a3, a12 /* Argument 2: Top of stack = register save area */
#ifdef __XTENSA_CALL0_ABI__
call0 xtensa_irq_dispatch /* Call xtensa_int_decode */
#else
movi a6, XTENSA_IRQ_TIMER0 /* Argument 1: Timer0 IRQ number */
mov a7, a12 /* Argument 2: Top of stack = register save area */
call4 xtensa_irq_dispatch /* Call xtensa_int_decode */
#endif

10
arch/xtensa/src/common/xtensa_panic.S
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@ -98,6 +98,10 @@
.align 4
_xtensa_panic:
/* Save the exception code */
wsr a2, EXCSAVE_1
/* Save rest of interrupt context (A2=address of state save area on
* stack.
*/
@ -126,11 +130,13 @@ _xtensa_panic:
* of the register save area.
*/
mov a3, sp
#ifdef __XTENSA_CALL0_ABI__
rsr a2, EXCSAVE_1
mov a3, sp
call0 xtensa_panic /* Call xtensa_panic. Should not return */
#else
rsr a6, EXCSAVE_1
mov a7, sp
call4 xtensa_panic /* Call xtensa_panic. Should not return */
#endif

14
arch/xtensa/src/common/xtensa_user_handler.S
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@ -229,12 +229,13 @@ _xtensa_user_handler:
* beginning of the register save area.
*/
#ifdef __XTENSA_CALL0_ABI__
rsr a2, EXCCAUSE /* Argument 1 (a2) = EXCCAUSE */
mov a3, sp /* Argument 2 (a2) = pointer to register save area */
#ifdef __XTENSA_CALL0_ABI__
calx0 xtensa_user /* Call xtensa_user */
#else
rsr a6, EXCCAUSE /* Argument 1 (a2) = EXCCAUSE */
mov a7, sp /* Argument 2 (a2) = pointer to register save area */
call4 xtensa_user /* Call xtensa_user */
#endif
@ -333,11 +334,13 @@ _xtensa_syscall_handler:
*/
mov a12, sp /* a12 = address of register save area */
#ifdef __XTENSA_CALL0_ABI__
movi a2, XTENSA_IRQ_SYSCALL /* Argument 1: IRQ number */
mov a3, a12 /* Argument 2: Top of stack = register save area */
#ifdef __XTENSA_CALL0_ABI__
call0 xtensa_irq_dispatch /* Call xtensa_int_decode */
#else
movi a6, XTENSA_IRQ_SYSCALL /* Argument 1: IRQ number */
mov a7, a12 /* Argument 2: Top of stack = register save area */
call4 xtensa_irq_dispatch /* Call xtensa_int_decode */
#endif
@ -468,12 +471,13 @@ _xtensa_coproc_handler:
* beginning of the register save area.
*/
#ifdef __XTENSA_CALL0_ABI__
rsr a2, EXCCAUSE /* Argument 1 (a2) = EXCCAUSE */
mov a3, sp /* Argument 2 (a2) = pointer to register save area */
#ifdef __XTENSA_CALL0_ABI__
calx0 xtensa_user /* Call xtensa_user */
#else
rsr a6, EXCCAUSE /* Argument 1 (a2) = EXCCAUSE */
mov a7, sp /* Argument 2 (a2) = pointer to register save area */
call4 xtensa_user /* Call xtensa_user */
#endif

4
arch/xtensa/src/esp32/esp32_cpuhead.S
View File

@ -138,11 +138,11 @@ __cpu1_start:
/* Finish initialization in C */
movi a2, 1 /* Argument 1: CPU ID */
#ifdef __XTENSA_CALL0_ABI__
movi a2, 1 /* Argument 1: CPU ID */
call0 xtensa_start_handler
#else
movi a6, 1 /* Argument 1: CPU ID */
call4 xtensa_start_handler
#endif