Add logic to support the FSMC SRAM in the NuttX heap
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4433 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
e59c942a68
commit
f0e62b7116
|
|
@ -54,35 +54,208 @@
|
|||
/****************************************************************************
|
||||
* Private Definitions
|
||||
****************************************************************************/
|
||||
/* Internal SRAM is available in all members of the STM32 family. The
|
||||
* following definitions must be provided to specify the size and
|
||||
* location of internal(system) SRAM:
|
||||
*
|
||||
* CONFIG_DRAM_END : End address (+1) of SRAM (F1 family only, the
|
||||
* : F4 family uses the a priori end of SRAM)
|
||||
*
|
||||
* The F4 family also contains internal TCM SRAM. This SRAM is different
|
||||
* because it cannot be used for DMA. So if DMA needed, then the following
|
||||
* should be defined to exclude TCM SRAM from the heap:
|
||||
*
|
||||
* CONFIG_STM32_TCMEXCLUDE : Exclude TCM SRAM from the HEAP
|
||||
*
|
||||
* In addition to internal SRAM, SRAM may also be available through the FSMC.
|
||||
* In order to use FSMC SRAM, the following additional things need to be
|
||||
* present in the NuttX configuration file:
|
||||
*
|
||||
* CONFIG_STM32_FSMC=y : Enables the FSMC
|
||||
* CONFIG_STM32_FSMC_SRAM=y : Indicates that SRAM is available via the
|
||||
* FSMC (as opposed to an LCD or FLASH).
|
||||
* CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
|
||||
* address space
|
||||
* CONFIG_HEAP2_END : The end (+1) of the SRAM in the FSMC
|
||||
* address space
|
||||
* CONFIG_MM_REGIONS : Must be set to a large enough value to
|
||||
* include the FSMC SRAM (as determined by the rules provided below)
|
||||
*/
|
||||
|
||||
/* For the STM312F10xxx family, all SRAM is in a contiguous block starting
|
||||
* at g_heapbase and extending through CONFIG_DRAM_END (my apologies for
|
||||
* the bad naming).
|
||||
#ifndef CONFIG_STM32_FSMC
|
||||
# undef CONFIG_STM32_FSMC_SRAM
|
||||
#endif
|
||||
|
||||
/* For the STM312F10xxx family, all internal SRAM is in one contiguous block
|
||||
* starting at g_heapbase and extending through CONFIG_DRAM_END (my apologies for
|
||||
* the bad naming). In addition, external FSMC SRAM may be available.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_STM32_STM32F10XX)
|
||||
/* Set the end of system SRAM */
|
||||
|
||||
# define SRAM1_END CONFIG_DRAM_END
|
||||
|
||||
/* Check if external FSMC SRAM is provided */
|
||||
|
||||
# if CONFIG_STM32_FSMC_SRAM
|
||||
# if CONFIG_MM_REGIONS < 2
|
||||
# warning "FSMC SRAM not included in the heap"
|
||||
# undef CONFIG_STM32_FSMC_SRAM
|
||||
# elif CONFIG_MM_REGIONS > 2
|
||||
# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are"
|
||||
# undef CONFIG_MM_REGIONS
|
||||
# define CONFIG_MM_REGIONS 2
|
||||
# endif
|
||||
# elif CONFIG_MM_REGIONS > 1
|
||||
# error "CONFIG_MM_REGIONS > 1 but I don't know what any of the region(s) are"
|
||||
# endif
|
||||
|
||||
/* The STM32 F1 has not TCM SRAM */
|
||||
|
||||
# undef CONFIG_STM32_TCMEXCLUDE
|
||||
# define CONFIG_STM32_TCMEXCLUDE 1
|
||||
|
||||
/* All members of the STM32F40xxx family have 192Kb in three banks:
|
||||
*
|
||||
* 1) 112Kb of SRAM beginning at address 0x2000:0000
|
||||
* 2) 16Kb of SRAM beginning at address 0x2001:c000
|
||||
* 1) 112Kb of System SRAM beginning at address 0x2000:0000
|
||||
* 2) 16Kb of System SRAM beginning at address 0x2001:c000
|
||||
* 3) 64Kb of TCM SRAM beginning at address 0x1000:0000
|
||||
*
|
||||
* As determined by ld.script, g_heapbase lies in the 112Kb memory
|
||||
* region and that extends to 0x2001:0000. But the first and second memory
|
||||
* regions are contiguous and treated as one in this logic that extends to
|
||||
* 0x2002:0000.
|
||||
*
|
||||
* As a complication, it appears that TCM SRAM cannot be used for DMA. So, if
|
||||
* STM32 DMA is enabled, TCM SRAM should probably be excluded from the heap.
|
||||
*
|
||||
* In addition, external FSMC SRAM may be available.
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_STM32_STM32F40XX)
|
||||
/* Set the end of system SRAM */
|
||||
|
||||
# define SRAM1_END 0x20020000
|
||||
|
||||
/* Set the range of TCM SRAM as well (although we may not use it) */
|
||||
|
||||
# define SRAM2_START 0x10000000
|
||||
# define SRAM2_END 0x10010000
|
||||
|
||||
/* There are 4 possible SRAM configurations:
|
||||
*
|
||||
* Configuration 1. System SRAM (only)
|
||||
* CONFIG_MM_REGIONS == 1
|
||||
* CONFIG_STM32_FSMC_SRAM NOT defined
|
||||
* CONFIG_STM32_TCMEXCLUDE defined
|
||||
* Configuration 2. System SRAM and TCM SRAM
|
||||
* CONFIG_MM_REGIONS == 2
|
||||
* CONFIG_STM32_FSMC_SRAM NOT defined
|
||||
* CONFIG_STM32_TCMEXCLUDE NOT defined
|
||||
* Configuration 3. System SRAM and FSMC SRAM
|
||||
* CONFIG_MM_REGIONS == 2
|
||||
* CONFIG_STM32_FSMC_SRAM defined
|
||||
* CONFIG_STM32_TCMEXCLUDE defined
|
||||
* Configuration 4. System SRAM, TCM SRAM, and FSMC SRAM
|
||||
* CONFIG_MM_REGIONS == 3
|
||||
* CONFIG_STM32_FSMC_SRAM defined
|
||||
* CONFIG_STM32_TCMEXCLUDE NOT defined
|
||||
*
|
||||
* Let's make sure that all definitions are consitent before doing
|
||||
* anything else
|
||||
*/
|
||||
|
||||
# if defined(CONFIG_STM32_FSMC_SRAM)
|
||||
|
||||
/* Configuration 3 or 4. External SRAM is available. CONFIG_MM_REGIONS
|
||||
* should be at least 2.
|
||||
*/
|
||||
|
||||
# if CONFIG_MM_REGIONS < 2
|
||||
/* Only one memory region. Force Configuration 1 */
|
||||
|
||||
# warning "FSMC SRAM (and TCM SRAM) excluded from the heap"
|
||||
# undef CONFIG_STM32_FSMC_SRAM
|
||||
# undef CONFIG_STM32_TCMEXCLUDE
|
||||
# define CONFIG_STM32_TCMEXCLUDE 1
|
||||
|
||||
/* CONFIG_MM_REGIONS may be 3 if TCM SRAM is included in the head */
|
||||
|
||||
# elif CONFIG_MM_REGIONS > 2
|
||||
|
||||
/* More than two memory regions. This is okay if TCM SRAM is not
|
||||
* disabled.
|
||||
*/
|
||||
|
||||
# if defined(CONFIG_STM32_TCMEXCLUDE)
|
||||
|
||||
/* Configuration 3: CONFIG_MM_REGIONS should have been 2 */
|
||||
|
||||
# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are"
|
||||
# undef CONFIG_MM_REGIONS
|
||||
# define CONFIG_MM_REGIONS 2
|
||||
# else
|
||||
|
||||
/* Configuration 4: DMA should be disabled and CONFIG_MM_REGIONS
|
||||
* should be 3.
|
||||
*/
|
||||
|
||||
# ifdef (CONFIG_STM32_DMA)
|
||||
# warning "TCM SRAM is included in the heap AND DMA is enabled"
|
||||
# endif
|
||||
# if CONFIG_MM_REGIONS != 3
|
||||
# error "CONFIG_MM_REGIONS > 3 but I don't know what any of the region(s) are"
|
||||
# undef CONFIG_MM_REGIONS
|
||||
# define CONFIG_MM_REGIONS 3
|
||||
# endif
|
||||
# endif
|
||||
|
||||
/* CONFIG_MM_REGIONS is exactly 2. We cannot support both TCM SRAM and
|
||||
* FSMC SRAM.
|
||||
*/
|
||||
|
||||
# elif !defined(CONFIG_STM32_TCMEXCLUDE)
|
||||
# error "CONFIG_MM_REGIONS == 2, cannot support both TCM SRAM and FSMC SRAM"
|
||||
# undef CONFIG_STM32_TCMEXCLUDE
|
||||
# define CONFIG_STM32_TCMEXCLUDE 1
|
||||
# endif
|
||||
|
||||
# elif !defined(CONFIG_STM32_TCMEXCLUDE)
|
||||
|
||||
/* Configuration 2: FSMC SRAM is not used, but TCM SRAM is requested. DMA
|
||||
* should be disabled and CONFIG_MM_REGIONS should be 2.
|
||||
*/
|
||||
|
||||
# ifdef (CONFIG_STM32_DMA)
|
||||
# warning "TCM SRAM is included in the heap AND DMA is enabled"
|
||||
# endif
|
||||
# if CONFIG_MM_REGIONS < 2
|
||||
# error "TCM SRAM excluded from the heap because CONFIG_MM_REGIONS < 2"
|
||||
# undef CONFIG_STM32_TCMEXCLUDE
|
||||
# define CONFIG_STM32_TCMEXCLUDE 1
|
||||
# elif CONFIG_MM_REGIONS > 2
|
||||
# error "CONFIG_MM_REGIONS > 2 but I don't know what any of the region(s) are"
|
||||
# undef CONFIG_MM_REGIONS
|
||||
# define CONFIG_MM_REGIONS 2
|
||||
# endif
|
||||
# endif
|
||||
#else
|
||||
# error "Unsupported STM32 chip"
|
||||
#endif
|
||||
|
||||
/* If FSMC SRAM is going to be used as heap, then verify that the starting
|
||||
* address and size of the external SRAM region has been provided in the
|
||||
* configuration.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_STM32_FSMC_SRAM
|
||||
# if !defined(CONFIG_HEAP2_BASE) || !defined(CONFIG_HEAP2_END)
|
||||
# error "CONFIG_HEAP2_BASE and CONFIG_HEAP2_END must be provided"
|
||||
# undef CONFIG_STM32_FSMC_SRAM
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
|
@ -123,41 +296,18 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
|
|||
****************************************************************************/
|
||||
|
||||
#if CONFIG_MM_REGIONS > 1
|
||||
# if defined(CONFIG_STM32_STM32F40XX)
|
||||
# if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
|
||||
# if CONFIG_MM_REGIONS > 3
|
||||
# error "CONFIG_MM_REGIONS > 3 but I don't know what all of the regions are"
|
||||
# endif
|
||||
# elif CONFIG_MM_REGIONS > 2
|
||||
# error "CONFIG_MM_REGIONS > 2 but I don't know what all of the regions are"
|
||||
# endif
|
||||
|
||||
void up_addregion(void)
|
||||
{
|
||||
/* Add the STM32F40xxx TCM SRAM heap region. */
|
||||
|
||||
#ifndef CONFIG_STM32_TCMEXCLUDE
|
||||
mm_addregion((FAR void*)SRAM2_START, SRAM2_END-SRAM2_START);
|
||||
#endif
|
||||
|
||||
/* Add the user specified heap region. */
|
||||
|
||||
# if CONFIG_MM_REGIONS > 2 && defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
|
||||
#ifdef CONFIG_STM32_FSMC_SRAM
|
||||
mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
|
||||
# endif
|
||||
}
|
||||
|
||||
# elif defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_END)
|
||||
# if CONFIG_MM_REGIONS > 2
|
||||
# error "CONFIG_MM_REGIONS > 2 but I don't know what all of the regions are"
|
||||
# endif
|
||||
|
||||
void up_addregion(void)
|
||||
{
|
||||
/* Add the user specified heap region. */
|
||||
|
||||
mm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_END - CONFIG_HEAP2_BASE);
|
||||
}
|
||||
|
||||
# else
|
||||
# error "CONFIG_MM_REGIONS > 1 but I don't know what any of the region(s) are"
|
||||
# endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -122,6 +122,16 @@
|
|||
#define CONFIG_STM32_I2CTIMEOTICKS \
|
||||
(SEC2TICK(CONFIG_STM32_I2CTIMEOSEC) + MSEC2TICK(CONFIG_STM32_I2CTIMEOMS))
|
||||
|
||||
/* On the STM32F103ZE, there is an internal conflict between I2C1 and FSMC. In that
|
||||
* case, it is necessary to disable FSMC before each I2C1 access and re-enable FSMC
|
||||
* when the I2C access completes.
|
||||
*/
|
||||
|
||||
#undef I2C1_FSMC_CONFLICT
|
||||
#if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_I2C1)
|
||||
# define I2C1_FSMC_CONFLICT
|
||||
#endif
|
||||
|
||||
/* Debug ****************************************************************************/
|
||||
/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
|
||||
|
||||
|
|
@ -263,7 +273,7 @@ static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
|
|||
static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv);
|
||||
static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
|
||||
static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
|
||||
#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1)
|
||||
#ifdef I2C1_FSMC_CONFLICT
|
||||
static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
|
||||
static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
|
||||
#endif
|
||||
|
|
@ -907,9 +917,12 @@ static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv)
|
|||
* FSMC must be disable while accessing I2C1 because it uses a common resource
|
||||
* (LBAR)
|
||||
*
|
||||
* NOTE: This is an issue with the STM32F103ZE, but may not be an issue with other
|
||||
* STM32s. You may need to experiment
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1)
|
||||
#ifdef I2C1_FSMC_CONFLICT
|
||||
static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
|
||||
{
|
||||
uint32_t ret = 0;
|
||||
|
|
@ -954,7 +967,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
|
|||
#else
|
||||
# define stm32_i2c_disablefsmc(priv) (0)
|
||||
# define stm32_i2c_enablefsmc(ahbenr)
|
||||
#endif
|
||||
#endif /* I2C1_FSMC_CONFLICT */
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_i2c_isr
|
||||
|
|
@ -1478,7 +1491,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
|
|||
* will not complete normally if the FSMC is enabled.
|
||||
*/
|
||||
|
||||
#if !defined(CONFIG_STM32_FSMC) || !defined (CONFIG_STM32_I2C1)
|
||||
#ifndef I2C1_FSMC_CONFLICT
|
||||
stm32_i2c_sem_waitstop(priv);
|
||||
#endif
|
||||
|
||||
|
|
@ -1619,7 +1632,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
|
|||
* will not complete normally if the FSMC is enabled.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_STM32_FSMC) && defined (CONFIG_STM32_I2C1)
|
||||
#ifdef I2C1_FSMC_CONFLICT
|
||||
stm32_i2c_sem_waitstop(priv);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue