From eca2c452c46b14e8cb2e92e89967448ed6a7b3b9 Mon Sep 17 00:00:00 2001 From: patacongo Date: Wed, 2 May 2007 01:14:06 +0000 Subject: [PATCH] Added some interrupt definitions git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@198 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/include/lpc214x/irq.h | 7 + arch/arm/src/lpc214x/chip.h | 179 +++++++++++++++-------- arch/arm/src/lpc214x/lpc214x_decodeirq.c | 45 +++++- arch/arm/src/lpc214x/lpc214x_irq.c | 110 +++++++++++--- arch/arm/src/lpc214x/lpc214x_lowputc.S | 10 +- arch/arm/src/lpc214x/lpc214x_vic.h | 64 ++++++++ configs/mcu123-lpc214x/defconfig | 5 +- 7 files changed, 323 insertions(+), 97 deletions(-) create mode 100755 arch/arm/src/lpc214x/lpc214x_vic.h diff --git a/arch/arm/include/lpc214x/irq.h b/arch/arm/include/lpc214x/irq.h index c199a585ca..457a903d8b 100644 --- a/arch/arm/include/lpc214x/irq.h +++ b/arch/arm/include/lpc214x/irq.h @@ -80,6 +80,8 @@ * Public Types ************************************************************/ +typedef void (*vic_vector_t)(uint32 *regs); + /************************************************************ * Inline functions ************************************************************/ @@ -100,6 +102,11 @@ extern "C" { #define EXTERN extern #endif +#ifndef CONFIG_VECTORED_INTERRUPTS +EXTERN void up_attach_vector(int irq, int vector, vic_vector_t handler); +EXTERN void up_detach_vector(int vector); +#endif + #undef EXTERN #ifdef __cplusplus } diff --git a/arch/arm/src/lpc214x/chip.h b/arch/arm/src/lpc214x/chip.h index b9effa977b..807777fd8e 100644 --- a/arch/arm/src/lpc214x/chip.h +++ b/arch/arm/src/lpc214x/chip.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************************************** * lpc214x/chip.h * * Copyright (C) 2007 Gregory Nutt. All rights reserved. @@ -31,109 +31,160 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************************************/ + ****************************************************************************************************/ #ifndef __LPC214X_CHIP_H #define __LPC214X_CHIP_H -/************************************************************************************ +/**************************************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************************************/ -/************************************************************************************ +/**************************************************************************************************** * Definitions - ************************************************************************************/ + ****************************************************************************************************/ -/* Memory Map ***********************************************************************/ +/* Memory Map ***************************************************************************************/ -#define LPC214X_FLASH_BASE 0x00000000 -#define LPC214X_ONCHIP_RAM_BASE 0x40000000 -#define LPC214X_USBDMA_RAM_BASE 0x7fd00000 -#define LPC214X_BOOT_BLOCK 0x7fffd000 -#define LPC214X_EXTMEM_BASE 0x80000000 -#define LPC214X_APB_BASE 0xe0000000 -#define LPC214X_AHB_BASE 0xf0000000 +#define LPC214X_FLASH_BASE 0x00000000 +#define LPC214X_ONCHIP_RAM_BASE 0x40000000 +#define LPC214X_USBDMA_RAM_BASE 0x7fd00000 +#define LPC214X_BOOT_BLOCK 0x7fffd000 +#define LPC214X_EXTMEM_BASE 0x80000000 +#define LPC214X_APB_BASE 0xe0000000 +#define LPC214X_AHB_BASE 0xf0000000 -/* Interrupts **********************************************************************/ +/* Interrupts **************************************************************************************/ -/* Peripheral Registers ************************************************************/ +/* Peripheral Registers ****************************************************************************/ /* Register block base addresses */ -#define LPC214X_UART0_BASE 0xe000c000 /* UART0 Base Address */ -#define LPC214X_UART1_BASE 0xe0010000 /* UART1 Base Address */ -#define LPC214X_PINSEL_BASE 0xc002c000 /* Pin funtion select registers */ -#define LPC214X_MAM_BASE 0xe01fc000 /* Memory Accelerator Module (MAM) Base Address */ -#define LPC214X_MEMMAP 0xe01fc040 /* Memory Mapping Control */ -#define LPC214X_PLL_BASE 0xe01fc080 /* Phase Locked Loop (PLL) Base Address */ -#define LPC214X_VPBDIV 0xe01fc100 /* VPBDIV Address */ -#define LPC214X_EMC_BASE 0xffe00000 /* External Memory Controller (EMC) Base Address */ +#define LPC214X_UART0_BASE 0xe000c000 /* UART0 Base Address */ +#define LPC214X_UART1_BASE 0xe0010000 /* UART1 Base Address */ +#define LPC214X_PINSEL_BASE 0xc002c000 /* Pin funtion select registers */ +#define LPC214X_MAM_BASE 0xe01fc000 /* Memory Accelerator Module (MAM) Base Address */ +#define LPC214X_MEMMAP 0xe01fc040 /* Memory Mapping Control */ +#define LPC214X_PLL_BASE 0xe01fc080 /* Phase Locked Loop (PLL) Base Address */ +#define LPC214X_VPBDIV 0xe01fc100 /* VPBDIV Address */ +#define LPC214X_EMC_BASE 0xffe00000 /* External Memory Controller (EMC) Base Address */ +#define LPC214X_VIC_BASE 0xffff0000 /* Vectored Interrupt Controller (VIC) Base */ /* UART0/1 Register Offsets */ -#define LPC214X_RBR_OFFSET 0x00 /* R: Receive Buffer Register (DLAB=0) */ -#define LPC214X_THR_OFFSET 0x00 /* W: Transmit Holding Register (DLAB=0) */ -#define LPC214X_DLL_OFFSET 0x00 /* W: Divisor Latch Register (LSB) */ -#define LPC214X_IER_OFFSET 0x04 /* W: Interrupt Enable Register (DLAB=0) */ -#define LPC214X_DLM_OFFSET 0x04 /* R/W: Divisor Latch Register (MSB, DLAB=1) */ -#define LPC214X_IIR_OFFSET 0x08 /* R: Interrupt ID Register (DLAB=) */ -#define LPC214X_FCR_OFFSET 0x08 /* W: FIFO Control Register */ -#define LPC214X_LCR_OFFSET 0x0c /* R/W: Line Control Register */ -#define LPC214X_MCR_OFFSET 0x10 /* R/W: Modem Control REgister (2146/6/8 UART1 Only) */ -#define LPC214X_LSR_OFFSET 0x14 /* R: Scratch Pad Register */ -#define LPC214X_MSR_OFFSET 0x18 /* R/W: MODEM Status Register (2146/6/8 UART1 Only) */ -#define LPC214X_SCR_OFFSET 0x1c /* R/W: Line Status Register */ -#define LPC214X_ACR_OFFSET 0x20 /* R/W: Autobaud Control Register */ -#define LPC214X_FDR_OFFSET 0x28 /* R/W: Fractional Divider Register */ -#define LPC214X_TER_OFFSET 0x30 /* R/W: Transmit Enable Register */ + +#define LPC214X_RBR_OFFSET 0x00 /* R: Receive Buffer Register (DLAB=0) */ +#define LPC214X_THR_OFFSET 0x00 /* W: Transmit Holding Register (DLAB=0) */ +#define LPC214X_DLL_OFFSET 0x00 /* W: Divisor Latch Register (LSB) */ +#define LPC214X_IER_OFFSET 0x04 /* W: Interrupt Enable Register (DLAB=0) */ +#define LPC214X_DLM_OFFSET 0x04 /* R/W: Divisor Latch Register (MSB, DLAB=1) */ +#define LPC214X_IIR_OFFSET 0x08 /* R: Interrupt ID Register (DLAB=) */ +#define LPC214X_FCR_OFFSET 0x08 /* W: FIFO Control Register */ +#define LPC214X_LCR_OFFSET 0x0c /* R/W: Line Control Register */ +#define LPC214X_MCR_OFFSET 0x10 /* R/W: Modem Control REgister (2146/6/8 UART1 Only) */ +#define LPC214X_LSR_OFFSET 0x14 /* R: Scratch Pad Register */ +#define LPC214X_MSR_OFFSET 0x18 /* R/W: MODEM Status Register (2146/6/8 UART1 Only) */ +#define LPC214X_SCR_OFFSET 0x1c /* R/W: Line Status Register */ +#define LPC214X_ACR_OFFSET 0x20 /* R/W: Autobaud Control Register */ +#define LPC214X_FDR_OFFSET 0x28 /* R/W: Fractional Divider Register */ +#define LPC214X_TER_OFFSET 0x30 /* R/W: Transmit Enable Register */ /* Pin function select register offsets */ -#define LPC214X_PINSEL0_OFFSET 0x00 /* Pin function select register 0 */ -#define LPC214X_PINSEL1_OFFSET 0x04 /* Pin function select register 1 */ -#define LPC214X_PINSEL2_OFFSET 0x14 /* Pin function select register 2 */ +#define LPC214X_PINSEL0_OFFSET 0x00 /* Pin function select register 0 */ +#define LPC214X_PINSEL1_OFFSET 0x04 /* Pin function select register 1 */ +#define LPC214X_PINSEL2_OFFSET 0x14 /* Pin function select register 2 */ /* Pin function select registers (these are normally referenced as offsets) */ -#define LPC214X_PINSEL0 (LPC214X_PINSEL_BASE + LPC214X_PINSEL0_OFFSET) -#define LPC214X_PINSEL1 (LPC214X_PINSEL_BASE + LPC214X_PINSEL1_OFFSET) -#define LPC214X_PINSEL2 (LPC214X_PINSEL_BASE + LPC214X_PINSEL2_OFFSET) +#define LPC214X_PINSEL0 (LPC214X_PINSEL_BASE + LPC214X_PINSEL0_OFFSET) +#define LPC214X_PINSEL1 (LPC214X_PINSEL_BASE + LPC214X_PINSEL1_OFFSET) +#define LPC214X_PINSEL2 (LPC214X_PINSEL_BASE + LPC214X_PINSEL2_OFFSET) /* Memory Accelerator Module (MAM) Regiser Offsets */ -#define LPC214X_MAMCR_OFFSET 0x00 /* MAM Control Offset*/ -#define LPC214x_MAMTIM_OFFSET 0x04 /* MAM Timing Offset */ +#define LPC214X_MAMCR_OFFSET 0x00 /* MAM Control Offset*/ +#define LPC214x_MAMTIM_OFFSET 0x04 /* MAM Timing Offset */ /* Phase Locked Loop (PLL) Register Offsets */ -#define LPC214X_PLLCON_OFFSET 0x00 /* PLL Control Offset*/ -#define LPC214X_PLLCFG_OFFSET 0x04 /* PLL Configuration Offset */ -#define LPC214X_PLLSTAT_OFFSET 0x08 /* PLL Status Offset */ -#define LPC214X_PLLFEED_OFFSET 0x0c /* PLL Feed Offset */ +#define LPC214X_PLLCON_OFFSET 0x00 /* PLL Control Offset*/ +#define LPC214X_PLLCFG_OFFSET 0x04 /* PLL Configuration Offset */ +#define LPC214X_PLLSTAT_OFFSET 0x08 /* PLL Status Offset */ +#define LPC214X_PLLFEED_OFFSET 0x0c /* PLL Feed Offset */ /* PLL Control Register Bit Settings */ -#define LPC214X_PLLCON_PLLE (1 <<0) /* PLL Enable */ -#define LPC214X_PLLCON_PLLC (1 <<1) /* PLL Connect */ +#define LPC214X_PLLCON_PLLE (1 <<0) /* PLL Enable */ +#define LPC214X_PLLCON_PLLC (1 <<1) /* PLL Connect */ /* PLL Configuration Register Bit Settings */ -#define LPC214X_PLLCFG_MSEL (0x1f << 0) /* PLL Multiplier */ -#define LPC214X_PLLCFG_PSEL (0x03 << 5) /* PLL Divider */ -#define LPC214X_PLLSTAT_PLOCK (1 << 10) /* PLL Lock Status */ +#define LPC214X_PLLCFG_MSEL (0x1f << 0) /* PLL Multiplier */ +#define LPC214X_PLLCFG_PSEL (0x03 << 5) /* PLL Divider */ +#define LPC214X_PLLSTAT_PLOCK (1 << 10) /* PLL Lock Status */ /* External Memory Controller (EMC) definitions */ -#define LPC214X_BCFG0_OFFSET 0x00 /* BCFG0 Offset */ -#define LPC214X_BCFG1_OFFSET 0x04 /* BCFG1 Offset */ -#define LPC214X_BCFG2_OFFSET 0x08 /* BCFG2 Offset */ -#define LPC214X_BCFG3_OFFSET 0x0c /* BCFG3 Offset */ +#define LPC214X_BCFG0_OFFSET 0x00 /* BCFG0 Offset */ +#define LPC214X_BCFG1_OFFSET 0x04 /* BCFG1 Offset */ +#define LPC214X_BCFG2_OFFSET 0x08 /* BCFG2 Offset */ +#define LPC214X_BCFG3_OFFSET 0x0c /* BCFG3 Offset */ -/************************************************************************************ +/* Vectored Interrupt Controller (VIC) register offsets */ + +#define LPC214X_VIC_IRQSTATUS_OFFSET 0x00 /* R: IRQ Status Register */ +#define LPC214X_VIC_FIQSTATUS_OFFSET 0x04 /* R: FIQ Status Register */ +#define LPC214X_VIC_RAWINTR_OFFSET 0x08 /* R: Raw Interrupt Status Register */ +#define LPC214X_VIC_INTSELECT_OFFSET 0x0c /* RW: Interrupt Select Register */ +#define LPC214X_VIC_INTENABLE_OFFSET 0x10 /* RW: Interrupt Enable Register */ +#define LPC214X_VIC_INTENCLEAR_OFFSET 0x14 /* W: Interrupt Enable Clear Register */ +#define LPC214X_VIC_SOFTINT_OFFSET 0x18 /* RW: Software Interrupt Register */ +#define LPC214X_VIC_SOFTINTCLEAR_OFFSET 0x1c /* W: Software Interrupt Clear Register */ +#define LPC214X_VIC_PROTECTION_OFFSET 0x20 /* Protection Enable Register */ + +#define LPC214X_VIC_VECTADDR_OFFSET 0x30 /* RW: Vector Address Register */ +#define LPC214X_VIC_DEFVECTADDR_OFFSET 0x34 /* RW: Default Vector Address Register */ + +#define LPC214X_VIC_VECTADDR0_OFFSET 0x100 /* RW: Vector Address 0 Register */ +#define LPC214X_VIC_VECTADDR1_OFFSET 0x104 /* RW: Vector Address 1 Register */ +#define LPC214X_VIC_VECTADDR2_OFFSET 0x108 /* RW: Vector Address 2 Register */ +#define LPC214X_VIC_VECTADDR3_OFFSET 0x10c /* RW: Vector Address 3 Register */ +#define LPC214X_VIC_VECTADDR4_OFFSET 0x110 /* RW: Vector Address 4 Register */ +#define LPC214X_VIC_VECTADDR5_OFFSET 0x114 /* RW: Vector Address 5 Register */ +#define LPC214X_VIC_VECTADDR6_OFFSET 0x118 /* RW: Vector Address 6 Register */ +#define LPC214X_VIC_VECTADDR7_OFFSET 0x11c /* RW: Vector Address 7 Register */ +#define LPC214X_VIC_VECTADDR8_OFFSET 0x120 /* RW: Vector Address 8 Register */ +#define LPC214X_VIC_VECTADDR9_OFFSET 0x124 /* RW: Vector Address 9 Register */ +#define LPC214X_VIC_VECTADDR10_OFFSET 0x128 /* RW: Vector Address 10 Register */ +#define LPC214X_VIC_VECTADDR11_OFFSET 0x12c /* RW: Vector Address 11 Register */ +#define LPC214X_VIC_VECTADDR12_OFFSET 0x130 /* RW: Vector Address 12 Register */ +#define LPC214X_VIC_VECTADDR13_OFFSET 0x134 /* RW: Vector Address 13 Register */ +#define LPC214X_VIC_VECTADDR14_OFFSET 0x138 /* RW: Vector Address 14 Register */ +#define LPC214X_VIC_VECTADDR15_OFFSET 0x13c /* RW: Vector Address 15 Register */ + +#define LPC214X_VIC_VECTCNTL0_OFFSET 0x200 /* RW: Vector Control 0 Register */ +#define LPC214X_VIC_VECTCNTL1_OFFSET 0x204 /* RW: Vector Control 1 Register */ +#define LPC214X_VIC_VECTCNTL2_OFFSET 0x208 /* RW: Vector Control 2 Register */ +#define LPC214X_VIC_VECTCNTL3_OFFSET 0x20c /* RW: Vector Control 3 Register */ +#define LPC214X_VIC_VECTCNTL4_OFFSET 0x210 /* RW: Vector Control 4 Register */ +#define LPC214X_VIC_VECTCNTL5_OFFSET 0x214 /* RW: Vector Control 5 Register */ +#define LPC214X_VIC_VECTCNTL6_OFFSET 0x218 /* RW: Vector Control 6 Register */ +#define LPC214X_VIC_VECTCNTL7_OFFSET 0x21c /* RW: Vector Control 7 Register */ +#define LPC214X_VIC_VECTCNTL8_OFFSET 0x220 /* RW: Vector Control 8 Register */ +#define LPC214X_VIC_VECTCNTL9_OFFSET 0x224 /* RW: Vector Control 9 Register */ +#define LPC214X_VIC_VECTCNTL10_OFFSET 0x228 /* RW: Vector Control 10 Register */ +#define LPC214X_VIC_VECTCNTL11_OFFSET 0x22c /* RW: Vector Control 11 Register */ +#define LPC214X_VIC_VECTCNTL12_OFFSET 0x230 /* RW: Vector Control 12 Register */ +#define LPC214X_VIC_VECTCNTL13_OFFSET 0x234 /* RW: Vector Control 13 Register */ +#define LPC214X_VIC_VECTCNTL14_OFFSET 0x238 /* RW: Vector Control 14 Register */ +#define LPC214X_VIC_VECTCNTL15_OFFSET 0x23c /* RW: Vector Control 15 Register */ + +/**************************************************************************************************** * Inline Functions - ************************************************************************************/ + ****************************************************************************************************/ -/************************************************************************************ +/**************************************************************************************************** * Global Function Prototypes - ************************************************************************************/ + ****************************************************************************************************/ #endif /* __LPC214X_CHIP_H */ diff --git a/arch/arm/src/lpc214x/lpc214x_decodeirq.c b/arch/arm/src/lpc214x/lpc214x_decodeirq.c index 9ac9f9fc62..f28be26061 100644 --- a/arch/arm/src/lpc214x/lpc214x_decodeirq.c +++ b/arch/arm/src/lpc214x/lpc214x_decodeirq.c @@ -43,14 +43,20 @@ #include #include #include + #include "up_arch.h" #include "os_internal.h" #include "up_internal.h" +#include "lpc214x_vic.h" /******************************************************************************** * Definitions ********************************************************************************/ +/******************************************************************************** + * Private Types + ********************************************************************************/ + /******************************************************************************** * Public Data ********************************************************************************/ @@ -64,10 +70,37 @@ ********************************************************************************/ /******************************************************************************** - * Public Funtions + * Public Funstions ********************************************************************************/ -void up_decodeirq(uint32* regs) +/******************************************************************************** + * up_decodeirq() and/or lpc214x_decodeirq() + * + * Description: + * The vectored interrupt controller (VIC) takes 32 interrupt request inputs + * and programmatically assigns them into 3 categories: FIQ, vectored IRQ, + * and non-vectored IRQ. + * + * - FIQs have the highest priority. There is a single FIQ vector, but multiple + * interrupt sources can be ORed to this FIQ vector. + * + * - Vectored IRQs have the middle priority. Any 16 of the 32 interrupt sources + * can be assigned to vectored IRQs. + * + * - Non-vectored IRQs have the lowest priority. + * + * The general flow of IRQ processing is to simply read the VIC vector address + * and jump to the address of the vector provided in the register. The VIC will + * provide the address of the highest priority vectored IRQ. If a non-vectored + * IRQ is requesting, the address of a default handler is provided. + * + ********************************************************************************/ + +#ifndef CONFIG_VECTORED_INTERRUPTS +void up_decodeirq(uint32 *regs) +#else +static void lpc214x_decodeirq( uint32 *regs) +#endif { #ifdef CONFIG_SUPPRESS_INTERRUPTS lib_lowprintf("Unexpected IRQ\n"); @@ -110,3 +143,11 @@ void up_decodeirq(uint32* regs) } #endif } + +#ifdef CONFIG_VECTORED_INTERRUPTS +void up_decodeirq(uint32 *regs) +{ + vic_vector_t vector = (vic_vector)vic_getreg(LPC214X_VIC_VECTADDR_OFFSET); + vector(regs); +} +#endif diff --git a/arch/arm/src/lpc214x/lpc214x_irq.c b/arch/arm/src/lpc214x/lpc214x_irq.c index a6d6654f77..8105fd8978 100644 --- a/arch/arm/src/lpc214x/lpc214x_irq.c +++ b/arch/arm/src/lpc214x/lpc214x_irq.c @@ -1,4 +1,4 @@ -/************************************************************ +/**************************************************************************** * lpc214x/lpc214x_irq.c * * Copyright (C) 2007 Gregory Nutt. All rights reserved. @@ -31,85 +31,151 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************/ + ****************************************************************************/ -/************************************************************ +/**************************************************************************** * Included Files - ************************************************************/ + ****************************************************************************/ #include #include #include + #include "up_arch.h" #include "os_internal.h" #include "up_internal.h" +#include "lpc214x_vic.h" -/************************************************************ +/**************************************************************************** * Definitions - ************************************************************/ + ****************************************************************************/ -/************************************************************ +/**************************************************************************** * Public Data - ************************************************************/ + ****************************************************************************/ uint32 *current_regs; -/************************************************************ +/**************************************************************************** * Private Data - ************************************************************/ + ****************************************************************************/ -/************************************************************ +/**************************************************************************** * Private Functions - ************************************************************/ + ****************************************************************************/ -/************************************************************ +/**************************************************************************** * Public Funtions - ************************************************************/ + ****************************************************************************/ -/************************************************************ +/**************************************************************************** * Name: up_irqinitialize - ************************************************************/ + ****************************************************************************/ void up_irqinitialize(void) { + int reg; + + /* Acknowledge and disable all interrupts */ + + vic_putreg(0, LPC214X_VIC_INTENCLEAR_OFFSET); + vic_putreg(0, LPC214X_VIC_INTENABLE_OFFSET); + + /* All IRQs, no FIQs */ + + vic_putreg(0, LPC214X_VIC_INTSELECT_OFFSET); + + /* Set the default vector */ + + vic_putreg((uint32)up_decodeirq, LPC214X_VIC_DEFVECTADDR_OFFSET); + + /* Disable all vectored interrupts */ + + for (reg = LPC214X_VIC_VECTCNTL0_OFFSET; + reg <= LPC214X_VIC_VECTCNTL15_OFFSET; + reg += 4) + { + vic_putreg(0, reg); + } + #warning "Not implemented" + + /* currents_regs is non-NULL only while processing an interrupt */ + + current_regs = NULL; + + /* And finally, enable interrupts */ + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + irqrestore(SVC_MODE | PSR_F_BIT); +#endif } -/************************************************************ +/**************************************************************************** * Name: up_disable_irq * * Description: * Disable the IRQ specified by 'irq' * - ************************************************************/ + ****************************************************************************/ void up_disable_irq(int irq) { #warning "Not implemented" } -/************************************************************ +/**************************************************************************** * Name: up_enable_irq * * Description: * Enable the IRQ specified by 'irq' * - ************************************************************/ + ****************************************************************************/ void up_enable_irq(int irq) { #warning "Not implemented" } -/************************************************************ +/**************************************************************************** * Name: up_maskack_irq * * Description: * Mask the IRQ and acknowledge it * - ************************************************************/ + ****************************************************************************/ void up_maskack_irq(int irq) { #warning "Not implemented" } + +/**************************************************************************** + * Name: up_attach_vector + * + * Description: + * Assign + * + ****************************************************************************/ + +#ifndef CONFIG_VECTORED_INTERRUPTS +void up_attach_vector(int irq, int vector, vic_vector_t handler) +{ +#warning "Not implemented" +} +#endif + +/**************************************************************************** + * Name: up_detach_vector + * + * Description: + * Mask the IRQ and acknowledge it + * + ****************************************************************************/ + +#ifndef CONFIG_VECTORED_INTERRUPTS +void up_detach_vector(int vector) +{ +#warning "Not implemented" +} +#endif diff --git a/arch/arm/src/lpc214x/lpc214x_lowputc.S b/arch/arm/src/lpc214x/lpc214x_lowputc.S index bd9a86d0b9..9ad6a47db1 100644 --- a/arch/arm/src/lpc214x/lpc214x_lowputc.S +++ b/arch/arm/src/lpc214x/lpc214x_lowputc.S @@ -53,9 +53,7 @@ # define LPC214X_UART_BAUD CONFIG_UART0_BAUD # define LPC214X_UART_BITS CONFIG_UART0_BITS # define LPC214X_UART_PARITY CONFIG_UART0_PARITY -# ifdef CONFIG_UART0_2STOP -# define LPC214X_UART_2STOP 1 -# endif +# define LPC214X_UART_2STOP CONFIG_UART0_2STOP #elif defined(CONFIG_UART1_SERIAL_CONSOLE) # define LPC214X_UART_BASE LPC214X_UART1_BASE # define LPC214X_UART_PINSEL LPC214X_UART1_PINSEL @@ -63,9 +61,7 @@ # define LPC214X_UART_BAUD CONFIG_UART1_BAUD # define LPC214X_UART_BITS CONFIG_UART1_BITS # define LPC214X_UART_PARITY CONFIG_UART1_PARITY -# ifdef CONFIG_UART1_2STOP -# define LPC214X_UART_2STOP 1 -# endif +# define LPC214X_UART_2STOP CONFIG_UART1_2STOP #else # error "No CONFIG_UARTn_SERIAL_CONSOLE Setting" #endif @@ -96,7 +92,7 @@ # error "No CONFIG_UARTn_PARITY Setting" #endif -#ifdef LPC214X_UART_2STOP +#ifdef LPC214X_UART_2STOP != 0 # define LPC214X_LCR_STOP LPC214X_LCR_STOP_2 #else # define LPC214X_LCR_STOP LPC214X_LCR_STOP_1 diff --git a/arch/arm/src/lpc214x/lpc214x_vic.h b/arch/arm/src/lpc214x/lpc214x_vic.h new file mode 100755 index 0000000000..d9b60501f5 --- /dev/null +++ b/arch/arm/src/lpc214x/lpc214x_vic.h @@ -0,0 +1,64 @@ +/************************************************************************************ + * lpc214x/vic.h + * + * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __LPC214X_VIC_H +#define __LPC214X_VIC_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* All VIC registers are 32-bits wide */ + +#define vic_getreg(o) getreg32(LPC214X_VIC_BASE+(o)) +#define vic_putreg(v,o) putreg32((v),LPC214X_VIC_BASE+(o)) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#endif /* __LPC214X_VIC_H */ diff --git a/configs/mcu123-lpc214x/defconfig b/configs/mcu123-lpc214x/defconfig index 8cfc96dc39..951968bca3 100644 --- a/configs/mcu123-lpc214x/defconfig +++ b/configs/mcu123-lpc214x/defconfig @@ -77,6 +77,7 @@ CONFIG_BCFG0_SETUP=n CONFIG_BCFG1_SETUP=n CONFIG_BCFG2_SETUP=n CONFIG_BCFG3_SETUP=n +CONFIG_ADC_SETUP=y # # LPC214X specific device driver settings @@ -104,8 +105,8 @@ CONFIG_UART0_BITS=8 CONFIG_UART1_BITS=8 CONFIG_UART0_PARITY=0 CONFIG_UART1_PARITY=0 -CONFIG_UART0_2STOP=n -CONFIG_UART1_2STOP=n +CONFIG_UART0_2STOP=0 +CONFIG_UART1_2STOP=0 # # General OS setup