serial/pl011: configurable clock frequency

move clock frequency into Kconfig

Signed-off-by: chao an <anchao@lixiang.com>
This commit is contained in:
chao an 2024-04-30 09:31:56 +08:00 committed by Xiang Xiao
parent 2295fa818d
commit e4d4c67b78
2 changed files with 20 additions and 4 deletions

View File

@ -18,6 +18,10 @@ config UART0_BASE
config UART0_IRQ
int "PL011 UART0 IRQ number"
config UART0_CLK_FREQ
int "PL011 UART0 clock frequency"
default 24000000
endif # UART0_PL011
config UART1_PL011
@ -33,6 +37,10 @@ config UART1_BASE
config UART1_IRQ
int "PL011 UART1 IRQ number"
config UART1_CLK_FREQ
int "PL011 UART1 clock frequency"
default 24000000
endif # UART1_PL011
config UART2_PL011
@ -48,6 +56,10 @@ config UART2_BASE
config UART2_IRQ
int "PL011 UART2 IRQ number"
config UART2_CLK_FREQ
int "PL011 UART2 clock frequency"
default 24000000
endif # UART2_PL011
config UART3_PL011
@ -63,6 +75,10 @@ config UART3_BASE
config UART3_IRQ
int "PL011 UART3 IRQ number"
config UART3_CLK_FREQ
int "PL011 UART3 clock frequency"
default 24000000
endif # UART3_PL011
endif # UART_PL011

View File

@ -301,7 +301,7 @@ static struct pl011_uart_port_s g_uart0priv =
.config =
{
.uart = (FAR volatile struct pl011_regs *)CONFIG_UART0_BASE,
.sys_clk_freq = 24000000,
.sys_clk_freq = CONFIG_UART0_CLK_FREQ,
},
.irq_num = CONFIG_UART0_IRQ,
@ -344,7 +344,7 @@ static struct pl011_uart_port_s g_uart1priv =
.config =
{
.uart = (FAR volatile struct pl011_regs *)CONFIG_UART1_BASE,
.sys_clk_freq = 24000000,
.sys_clk_freq = CONFIG_UART1_CLK_FREQ,
},
.irq_num = CONFIG_UART1_IRQ,
@ -387,7 +387,7 @@ static struct pl011_uart_port_s g_uart2priv =
.config =
{
.uart = (FAR volatile struct pl011_regs *)CONFIG_UART2_BASE,
.sys_clk_freq = 24000000,
.sys_clk_freq = CONFIG_UART2_CLK_FREQ,
},
.irq_num = CONFIG_UART2_IRQ,
@ -430,7 +430,7 @@ static struct pl011_uart_port_s g_uart3priv =
.config =
{
.uart = (FAR volatile struct pl011_regs *)CONFIG_UART3_BASE,
.sys_clk_freq = 24000000,
.sys_clk_freq = CONFIG_UART3_CLK_FREQ,
},
.irq_num = CONFIG_UART3_IRQ,