xtensa/esp32: Fix code nxstyle issue
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e44ec9e48e
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@ -0,0 +1,112 @@
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/****************************************************************************
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* arch/xtensa/src/common/xtensa_counter.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_COUNTER_H
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#define __ARCH_XTENSA_SRC_COMMON_XTENSA_COUNTER_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include "xtensa_timer.h"
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Name: xtensa_getcount
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*
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* Description:
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* Get the current value of the cycle count register.
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*
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****************************************************************************/
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static inline uint32_t xtensa_getcount(void)
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{
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uint32_t count;
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__asm__ __volatile__
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(
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"rsr %0, CCOUNT" : "=r"(count)
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);
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return count;
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}
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/****************************************************************************
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* Name: xtensa_setcount
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*
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* Description:
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* Set the value of the cycle count register.
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*
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****************************************************************************/
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static inline void xtensa_setcount(uint32_t ticks)
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{
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__asm__ __volatile__
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(
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"wsr %0, ccount\n"
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:
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: "a"(ticks)
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: "memory"
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);
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}
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/****************************************************************************
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* Name: xtensa_getcompare
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*
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* Description:
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* Get the old value of the compare register.
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*
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****************************************************************************/
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static inline uint32_t xtensa_getcompare(void)
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{
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uint32_t compare;
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__asm__ __volatile__
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(
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"rsr %0, %1" : "=r"(compare) : "I"(XT_CCOMPARE)
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);
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return compare;
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}
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/****************************************************************************
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* Name: xtensa_getcompare
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*
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* Description:
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* Set the value of the compare register.
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*
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****************************************************************************/
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static inline void xtensa_setcompare(uint32_t compare)
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{
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__asm__ __volatile__
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(
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"wsr %0, %1" : : "r"(compare), "I"(XT_CCOMPARE)
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);
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}
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#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_COUNTER_H */
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@ -972,17 +972,17 @@ config ESP32_WIFI_STA_DISCONNECT_PM
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Chip will do modem-sleep when RF module is not in use anymore.
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config EXAMPLE_WIFI_LISTEN_INTERVAL
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int "WiFi listen interval"
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default 3
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help
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int "Wi-Fi listen interval"
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default 3
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---help---
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Interval for station to listen to beacon from AP. The unit of listen interval is one beacon interval.
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For example, if beacon interval is 100 ms and listen interval is 3, the interval for station to listen
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to beacon is 300 ms.
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choice EXAMPLE_POWER_SAVE_MODE
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prompt "power save mode"
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prompt "Power save mode"
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default EXAMPLE_POWER_SAVE_NONE
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help
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---help---
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Power save mode for the esp32 to use. Modem sleep mode includes minimum and maximum power save modes.
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In minimum power save mode, station wakes up every DTIM to receive beacon. Broadcast data will not be
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lost because it is transmitted after DTIM. However, it can not save much more power if DTIM is short
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@ -1074,7 +1074,7 @@ config ESP32_AUTO_SLEEP
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Enable ESP32 Auto-sleep
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config ESP32_TICKLESS
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bool "Enable ESP32 tick-less OS"
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bool "Enable ESP32 tickless OS"
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default n
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select ARCH_HAVE_TICKLESS
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select SCHED_TICKLESS
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@ -78,10 +78,10 @@ CHIP_CSRCS += esp32_gpio.c esp32_intdecode.c esp32_irq.c esp32_region.c
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CHIP_CSRCS += esp32_user.c
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CHIP_CSRCS += esp32_dma.c
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += esp32_timerisr.c
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else
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ifeq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += esp32_tickless.c
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else
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CHIP_CSRCS += esp32_timerisr.c
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endif
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ifeq ($(CONFIG_PM),y)
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@ -96,24 +96,20 @@ static void up_idlepm(void)
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irqstate_t flags;
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#ifdef CONFIG_ESP32_AUTO_SLEEP
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uint64_t sleep_us;
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uint64_t os_idle_us;
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uint64_t os_start_us;
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uint64_t os_end_us;
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uint64_t os_step_us;
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uint64_t hw_idle_us;
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uint64_t hw_start_us;
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uint64_t hw_end_us;
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uint64_t hw_step_us;
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uint64_t rtc_diff_us;
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struct timespec ts;
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flags = spin_lock_irqsave(NULL);
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if (esp32_pm_lockstatus() == 0)
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{
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os_idle_us = up_get_idletime();
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hw_idle_us = rt_timer_get_alarm();
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sleep_us = MIN(os_idle_us, hw_idle_us);
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uint64_t os_start_us;
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uint64_t os_end_us;
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uint64_t os_step_us;
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uint64_t hw_start_us;
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uint64_t hw_end_us;
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uint64_t hw_step_us;
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uint64_t rtc_diff_us;
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struct timespec ts;
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uint64_t os_idle_us = up_get_idletime();
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uint64_t hw_idle_us = rt_timer_get_alarm();
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uint64_t sleep_us = MIN(os_idle_us, hw_idle_us);
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if (sleep_us > EXPECTED_IDLE_TIME_US)
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{
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sleep_us -= EARLY_WAKEUP_US;
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@ -200,7 +200,8 @@ static struct esp32_sleep_config_t s_config =
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{ ESP_PD_OPTION_AUTO, ESP_PD_OPTION_AUTO, ESP_PD_OPTION_AUTO },
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.wakeup_triggers = 0
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};
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static volatile uint32_t pm_wakelock = 0;
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static _Atomic uint32_t pm_wakelock = 0;
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/****************************************************************************
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* Private Functions
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@ -915,7 +916,7 @@ int esp32_light_sleep_start(uint64_t *sleep_time)
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ret = esp32_light_sleep_inner(pd_flags, flash_enable_time_us,
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vddsdio_config);
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if (sleep_time)
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if (sleep_time != NULL)
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{
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*sleep_time = esp32_rtc_time_slowclk_to_us(esp32_rtc_time_get() -
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s_config.rtc_ticks_at_sleep_start, esp32_clk_slowclk_cal_get());
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@ -997,7 +998,7 @@ void esp32_pmstandby(uint64_t time_in_us)
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up_step_idletime((uint32_t)time_in_us);
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#endif
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pwrinfo("Returned from auto-sleep, slept for %d ms\n",
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pwrinfo("Returned from auto-sleep, slept for %" PRIu32 " ms\n",
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(uint32_t)(rtc_diff_us) / 1000);
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}
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@ -1140,11 +1141,7 @@ void esp32_pmsleep(uint64_t time_in_us)
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void IRAM_ATTR esp32_pm_lockacquire(void)
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{
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irqstate_t flags;
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flags = enter_critical_section();
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++pm_wakelock;
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leave_critical_section(flags);
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}
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/****************************************************************************
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@ -1157,11 +1154,7 @@ void IRAM_ATTR esp32_pm_lockacquire(void)
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void IRAM_ATTR esp32_pm_lockrelease(void)
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{
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irqstate_t flags;
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flags = enter_critical_section();
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--pm_wakelock;
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leave_critical_section(flags);
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}
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/****************************************************************************
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@ -1017,8 +1017,8 @@ uint64_t IRAM_ATTR esp32_rtc_time_us_to_slowclk(uint64_t time_in_us,
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* Convert time interval from RTC_SLOW_CLK to microseconds
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*
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* Input Parameters:
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* time_in_us - Time interval in RTC_SLOW_CLK cycles
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* slow_clk_period - Period of slow clock in microseconds
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* rtc_cycles - Time interval in RTC_SLOW_CLK cycles
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* period - Period of slow clock in microseconds
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*
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* Returned Value:
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* Time interval in microseconds
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@ -308,8 +308,8 @@ uint64_t esp32_rtc_time_us_to_slowclk(uint64_t time_in_us, uint32_t period);
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* Convert time interval from RTC_SLOW_CLK to microseconds
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*
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* Input Parameters:
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* time_in_us - Time interval in RTC_SLOW_CLK cycles
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* slow_clk_period - Period of slow clock in microseconds
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* rtc_cycles - Time interval in RTC_SLOW_CLK cycles
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* period - Period of slow clock in microseconds
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*
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* Returned Value:
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* Time interval in microseconds
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@ -62,6 +62,7 @@
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#include "xtensa_timer.h"
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#include "xtensa.h"
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#include "xtensa_attr.h"
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#include "xtensa_counter.h"
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#ifdef CONFIG_SCHED_TICKLESS
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@ -74,6 +75,7 @@
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#define SEC_2_CTICK(s) ((s) * CTICK_PER_SEC)
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#define USEC_2_CTICK(us) ((us) * CTICK_PER_USEC)
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#define NSEC_2_CTICK(nsec) (((nsec) * CTICK_PER_USEC) / NSEC_PER_USEC)
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#define CTICK_2_SEC(tick) ((tick) / CTICK_PER_SEC)
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#define CTICK_2_USEC(tick) ((tick) / CTICK_PER_USEC)
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@ -85,10 +87,6 @@
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* Private Function Prototypes
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****************************************************************************/
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static inline uint32_t xtensa_getcount(void);
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static inline uint32_t xtensa_getcompare(void);
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static inline void xtensa_setcount(uint32_t ticks);
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static inline void xtensa_setcompare(uint32_t compare);
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static inline uint64_t up_tmr_total_count(void);
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static inline uint64_t up_tmr_getcount(void);
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static void IRAM_ATTR up_tmr_setcompare(uint32_t ticks);
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@ -99,75 +97,18 @@ static int up_timer_expire(int irq, void *regs, FAR void *arg);
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* Private Data
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****************************************************************************/
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static bool g_timer_started;
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static uint64_t g_cticks;
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static uint32_t g_loop_cnt;
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static bool g_timer_started; /* Whether an interval timer is being started */
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static uint64_t g_cticks; /* Total ticks of system since power-on */
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static uint32_t g_loop_cnt; /* System Cycle counter cycle times */
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/* Redundant ticks of an interval timer on the cycle counter */
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static uint32_t g_last_cticks;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Function: xtensa_getcount, xtensa_setcount
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* xtensa_getcompare, and xtensa_setcompare
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*
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* Description:
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* Lower level operations on Xtensa special registers.
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*
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****************************************************************************/
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/* Return the current value of the cycle count register */
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static inline uint32_t xtensa_getcount(void)
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{
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uint32_t count;
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__asm__ __volatile__
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(
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"rsr %0, CCOUNT" : "=r"(count)
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);
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return count;
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}
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/* Set the value of the cycle count register */
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static inline void xtensa_setcount(uint32_t ticks)
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{
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__asm__ __volatile__
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(
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"wsr %0, ccount\n"
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:
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: "a"(ticks)
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: "memory"
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);
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}
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/* Return the old value of the compare register */
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static inline uint32_t xtensa_getcompare(void)
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{
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uint32_t compare;
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__asm__ __volatile__
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(
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"rsr %0, %1" : "=r"(compare) : "I"(XT_CCOMPARE)
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);
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return compare;
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}
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/* Set the value of the compare register */
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static inline void xtensa_setcompare(uint32_t compare)
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{
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__asm__ __volatile__
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(
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"wsr %0, %1" : : "r"(compare), "I"(XT_CCOMPARE)
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);
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}
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/****************************************************************************
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* Name: up_tmr_total_count
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*
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@ -211,14 +152,14 @@ static inline uint64_t up_tmr_getcount(void)
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* Name: up_tmr_setcompare
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*
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* Description:
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* Set the value of the compare register and
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* save the currently running system tick.
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* Set the value of the compare register, save the currently running
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* system tick and clear cycle count register.
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*
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* Input Parameters:
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* None
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* ticks - Set the new value of the compare register
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*
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* Returned Value:
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* Remaining ticks
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* None
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*
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****************************************************************************/
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@ -245,10 +186,11 @@ static void IRAM_ATTR up_tmr_setcompare(uint32_t ticks)
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static void IRAM_ATTR up_tmr_setcount(uint64_t ticks)
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{
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irqstate_t flags;
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uint32_t loop_cnt;
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uint32_t last_ticks;
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if (!ticks)
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if (ticks == 0)
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{
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ticks = 1;
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}
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@ -256,7 +198,7 @@ static void IRAM_ATTR up_tmr_setcount(uint64_t ticks)
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loop_cnt = ticks / CPU_TICKS_MAX;
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last_ticks = ticks % CPU_TICKS_MAX;
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if (loop_cnt)
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if (loop_cnt != 0)
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{
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xtensa_setcompare(CPU_TICKS_MAX);
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}
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@ -265,10 +207,14 @@ static void IRAM_ATTR up_tmr_setcount(uint64_t ticks)
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xtensa_setcompare(last_ticks);
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}
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flags = enter_critical_section();
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g_loop_cnt = loop_cnt;
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g_last_cticks = last_ticks;
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g_timer_started = true;
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leave_critical_section(flags);
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g_cticks += xtensa_getcount();
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xtensa_setcount(0);
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}
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@ -296,12 +242,12 @@ static int up_timer_expire(int irq, void *regs, FAR void *arg)
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if (g_timer_started)
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{
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if (g_loop_cnt)
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if (g_loop_cnt != 0)
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{
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--g_loop_cnt;
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if (!g_loop_cnt)
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if (g_loop_cnt == 0)
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{
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if (g_last_cticks)
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if (g_last_cticks != 0)
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{
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up_tmr_setcompare(g_last_cticks);
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}
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@ -433,7 +379,7 @@ int IRAM_ATTR up_timer_cancel(FAR struct timespec *ts)
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flags = enter_critical_section();
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if (ts)
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if (ts != NULL)
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{
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if (!g_timer_started)
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{
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@ -503,7 +449,7 @@ int IRAM_ATTR up_timer_start(FAR const struct timespec *ts)
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}
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cpu_ticks = SEC_2_CTICK((uint64_t)ts->tv_sec) +
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USEC_2_CTICK((uint64_t)ts->tv_nsec / 1000);
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NSEC_2_CTICK((uint64_t)ts->tv_nsec);
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up_tmr_setcount(cpu_ticks);
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@ -18,12 +18,14 @@
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_TICKLESS_H
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#define __ARCH_XTENSA_SRC_ESP32_ESP32_TICKLESS_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_TICKLESS_H
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#define __ARCH_XTENSA_SRC_ESP32_ESP32_TICKLESS_H
|
||||
#include <stdint.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
|
|
|
@ -33,7 +33,7 @@
|
|||
#include <arch/board/board.h>
|
||||
|
||||
#include "clock/clock.h"
|
||||
#include "xtensa_timer.h"
|
||||
#include "xtensa_counter.h"
|
||||
#include "xtensa.h"
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -46,52 +46,6 @@ static uint32_t g_tick_divisor;
|
|||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: xtensa_getcount, xtensa_getcompare, and xtensa_setcompare
|
||||
*
|
||||
* Description:
|
||||
* Lower level operations on Xtensa special registers.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* Return the current value of the cycle count register */
|
||||
|
||||
static inline uint32_t xtensa_getcount(void)
|
||||
{
|
||||
uint32_t count;
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"rsr %0, CCOUNT" : "=r"(count)
|
||||
);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/* Return the old value of the compare register */
|
||||
|
||||
static inline uint32_t xtensa_getcompare(void)
|
||||
{
|
||||
uint32_t compare;
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"rsr %0, %1" : "=r"(compare) : "I"(XT_CCOMPARE)
|
||||
);
|
||||
|
||||
return compare;
|
||||
}
|
||||
|
||||
/* Set the value of the compare register */
|
||||
|
||||
static inline void xtensa_setcompare(uint32_t compare)
|
||||
{
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"wsr %0, %1" : : "r"(compare), "I"(XT_CCOMPARE)
|
||||
);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Function: esp32_timerisr
|
||||
*
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_SCHED_LPWORK=y
|
|||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_SIG_DEFAULT=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPIFFS_NAME_MAX=48
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
|
|
|
@ -39,7 +39,6 @@ CONFIG_RAM_START=0x20000000
|
|||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
CONFIG_START_YEAR=2011
|
||||
|
|
|
@ -194,8 +194,7 @@ int esp32_bringup(void)
|
|||
ret = esp32_rt_timer_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize RT timer error\n");
|
||||
return ret;
|
||||
syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -62,7 +62,6 @@ CONFIG_SCHED_LPWORK=y
|
|||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_SIG_DEFAULT=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPIFFS_NAME_MAX=48
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
|
|
|
@ -161,8 +161,7 @@ int esp32_bringup(void)
|
|||
ret = esp32_rt_timer_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize RT timer error\n");
|
||||
return ret;
|
||||
syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -63,7 +63,6 @@ CONFIG_SCHED_LPWORK=y
|
|||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_SIG_DEFAULT=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPIFFS_NAME_MAX=48
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
|
|
|
@ -181,8 +181,7 @@ int esp32_bringup(void)
|
|||
ret = esp32_rt_timer_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize RT timer error\n");
|
||||
return ret;
|
||||
syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
Loading…
Reference in New Issue