From dd16b861859b9aecfdd9ed4ddaa161c9355801d6 Mon Sep 17 00:00:00 2001 From: patacongo Date: Thu, 26 Jul 2012 20:38:46 +0000 Subject: [PATCH] Mostly cosmetic updates git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4980 42af7a65-404d-4744-a932-0658087f49c3 --- Documentation/NuttX.html | 10 +- Documentation/NuttXRelated.html | 143 ++++++++++++++-------------- configs/stm32f4discovery/README.txt | 67 ++++++------- drivers/Kconfig | 4 +- drivers/analog/Kconfig | 69 ++++++++++++-- drivers/lcd/p14201.c | 80 ++++++++-------- include/nuttx/analog/pga11x.h | 2 +- 7 files changed, 217 insertions(+), 158 deletions(-) diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html index 7c07a0f3fb..64f02f0812 100644 --- a/Documentation/NuttX.html +++ b/Documentation/NuttX.html @@ -8,7 +8,7 @@

NuttX RTOS

-

Last Updated: July 19, 2012

+

Last Updated: July 25, 2012

@@ -2300,11 +2300,13 @@ STATUS: The basic port is code complete. Two configurations are available: - An OS test configuration and a that support the NuttShell (NSH). + (1) An OS test configuration and a (2) configuration that support the NuttShell (NSH). The OS test configuration is fully functional and proves that we have a basically healthy NuttX port to the Mirtoo. - This includes support for the SST25 serial FLASH on board the module. + The NSH configuration includes support for a serial console and for the SST25 serial FLASH and the PGA117 amplifier/multiplexer on board the module. + The NSH configuration is set up to use the NuttX wear-leveling FLASH file system (NXFFS). + The PGA117, however, is not yet fully integrated to support ADC sampling. See the NSH User Guide for further information about NSH. - There are some remaining issues to be resolved with the NSH configuration but, with any luck, the verified port should be available with the NuttX 6.20 release. + The first verified port to the Mirtoo module was available with the NuttX 6.20 release.

diff --git a/Documentation/NuttXRelated.html b/Documentation/NuttXRelated.html index fac7c57459..bc55bbfc12 100644 --- a/Documentation/NuttXRelated.html +++ b/Documentation/NuttXRelated.html @@ -1,71 +1,72 @@ - - - NuttX Links - - -  - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - Project Links -
- - - - - Documentation -
- - - Related Projects -
  -
  • Osmocom-BB
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  • RGMP
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    - - - - - Commercial Sites -
    - - NuttX - -
    - - NuttX - NuttX - -
    - - + + + NuttX Links + + +  + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + + + + + Project Links +
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  • Osmocom-BB
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  • PX4 Autopilot
    • +
  • RGMP
    • +
    + + + + + Commercial Sites +
    + + NuttX + +
    + + NuttX + NuttX + +
    + + diff --git a/configs/stm32f4discovery/README.txt b/configs/stm32f4discovery/README.txt index adc10b7a0b..ce15aa33d1 100755 --- a/configs/stm32f4discovery/README.txt +++ b/configs/stm32f4discovery/README.txt @@ -508,12 +508,12 @@ I purchased an LCD display on eBay from china. The LCD is 320x240 RGB565 and is based on an SSD1289 LCD controller and an XPT2046 touch IC. The pin out from the 2x16 connect on the LCD is labeled as follows: -LCD CONNECTOR: SSD1289 MPU INTERFACE PINS +LCD CONNECTOR: SSD1289 MPU INTERFACE PINS: - +------+------+ DEN I Display enble pin -1 | GND | 3V3 | 2 VSYNC I Frame synchonrization signal - +------+------+ HSYNC I Line synchroniziation signal -3 | D1 | D0 | 4 DOTCLIK I Dot clock ans OSC source + +------+------+ DEN I Display enable pin +1 | GND | 3V3 | 2 VSYNC I Frame synchronization signal + +------+------+ HSYNC I Line synchronization signal +3 | D1 | D0 | 4 DOTCLK I Dot clock and OSC source +------+------+ DC I Data or command 5 | D3 | D2 | 6 E (~RD) I Enable/Read strobe +------+------+ R (~WR) I Read/Write strobe @@ -531,12 +531,12 @@ LCD CONNECTOR: SSD1289 MPU INTERFACE PINS +------+------+ 19 | RS | CS | 20 +------+------+ -21 | RD | WR | 22 +21 | RD | WR | 22 NOTES: +------+------+ -23 |EL_CNT|RESET | 24 - +------+------+ -25 |TP_RQ |TP_S0 | 26 These pins are for the touch panel +23 |BL_CNT|RESET | 24 BL_CNT is the PWM backlight level control. +------+------+ +25 |TP_RQ |TP_S0 | 26 These pins are for the touch panel: TP_REQ + +------+------+ TP_S0, TP_SI, TP_SCX, and TP_CS 27 | NC |TP_SI | 28 +------+------+ 29 | NC |TP_SCX| 30 @@ -546,31 +546,32 @@ LCD CONNECTOR: SSD1289 MPU INTERFACE PINS MAPPING TO STM32 F4: - ---------------- ------------- ---------------------------------- + ---------------- -------------- ---------------------------------- STM32 FUNCTION LCD PIN STM32F4Discovery PIN - ---------------- ------------- ---------------------------------- - FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1) - FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2) - FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O - FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O - FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O - FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O - FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O - FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O - FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O - FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O - FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O - FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O - FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O - FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O - FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O - FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O - FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O - FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O - FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3) - FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4) - PC6 RESET pin 24 PC6 P2 pin 47 Free I/O - ---------------- ------------- ---------------------------------- + ---------------- -------------- ---------------------------------- + FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1) + FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2) + FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O + FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O + FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O + FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O + FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O + FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O + FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O + FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O + FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O + FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O + FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O + FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O + FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O + FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O + FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O + FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O + FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3) + FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4) + PC6 RESET pin 24 PC6 P2 pin 47 Free I/O + Timer ouput BL_CNT pin 23 (to be determined) + ---------------- -------------- ---------------------------------- 1 Used for the RED LED 2 Used for the BLUE LED diff --git a/drivers/Kconfig b/drivers/Kconfig index b605166b0c..abbe2d2133 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -126,7 +126,7 @@ config CAN_LOOPBACK A CAN driver may or may not support a loopback mode for testing. If the driver does support loopback mode, the setting will enable it. (If the driver does not, this setting will have no effect). - + endif config PWM @@ -201,7 +201,7 @@ if WATCHDOG endif menuconfig ANALOG - bool "Analog Device(adc,dac) support" + bool "Analog Device(ADC/DAC) support" default n ---help--- This directory holds implementations of analog device drivers. diff --git a/drivers/analog/Kconfig b/drivers/analog/Kconfig index e3205d7cb7..ebed79c788 100644 --- a/drivers/analog/Kconfig +++ b/drivers/analog/Kconfig @@ -3,22 +3,75 @@ # see misc/tools/kconfig-language.txt. # -config CONFIG_ADC - bool "Analog Digital Convert" +config ADC + bool "Analog-to-Digital Conversion" default n + ---help--- + Select to enable support for analog input device support. This includes + not only Analog-to-Digital Converters (ADC) but also amplifiers and + analog multiplexers. config ADC_ADS125X - bool "TI ads1255/ads1256 support" + bool "TI ADS1255/ADS1256 support" default n - depends on CONFIG_ADC + depends on ADC select SPI - -config CONFIG_DAC - bool "Digital Analog Convert" + +config ADS1255_FREQUENCY + int "ADS1255/ADS1256 SPI frequency" + default 1000000 + depends on ADC_ADS125X + +config ADC_PGA11X + bool "TI PGA112/3/6/7 support" + default n + depends on ADC + select SPI + ---help--- + Enables support for the PGA112, PGA113, PGA116, PGA117 Zerø-Drift + PROGRAMMABLE GAIN AMPLIFIER with MUX + +config PGA11X_SPIFREQUENCY + int "TI PGA112/3/6/7 SPI frequency" + default 1000000 + depends on ADC_PGA11X + ---help--- + PGA11x SPI frequency. + +config PGA11X_SPIMODE + int "TI PGA112/3/6/7 SPI mode" + default 0 + depends on ADC_PGA11X + ---help--- + PGA11x SPI mode. The specification says that the device operates in Mode 0 or + Mode 3. But sometimes you need to tinker with this to get things to work + correctly. Default: Mode 0 + +config PGA11X_DAISYCHAIN + bool "TI PGA112/3/6/7 daisy chain mode" + default n + depends on ADC_PGA11X + ---help--- + Enable support to use two PGA116/7's in Daisy Chain configuration. + +config PGA11X_MULTIPLE + bool "Multiple TI PGA112/3/6/7 support" + default n + depends on ADC_PGA11X && !PGA11X_DAISYCHAIN + ---help--- + Can be defined to support multiple PGA11X devices on board with separate + chip selects (not daisy chained). Each device will require a customized + SPI interface to distinguish them when SPI_SELECT is called with + devid=SPIDEV_MUX. + +config DAC + bool "Digital-to-Analog Conversion" default n + ---help--- + Select to enable support for Digital-to-Analog Converters (DACs). config DAC_AD5410 bool "AD5410 support" default n - depends on CONFIG_DAC + depends on DAC select SPI diff --git a/drivers/lcd/p14201.c b/drivers/lcd/p14201.c index 9dd2e6da9d..934d251ca9 100644 --- a/drivers/lcd/p14201.c +++ b/drivers/lcd/p14201.c @@ -2,8 +2,8 @@ * drivers/lcd/p14201.c * Driver for RiT P14201 series display (wih sd1329 IC controller) * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -269,7 +269,7 @@ static uint8_t g_runbuffer[RIT_XRES / 2]; /* CONFIG_P14201_FRAMEBUFFER - If defined, accesses will be performed using an in-memory * copy of the OLEDs GDDRAM. This cost of this buffer is 128 * 64 / 2 = 4Kb. If this - * is defined, then the driver will be full functioned. If not, then: + * is defined, then the driver will be full functional. If not, then: * * - Reading graphics memory cannot be supported, and * - All pixel writes must be aligned to byte boundaries. @@ -291,7 +291,7 @@ static const struct fb_videoinfo_s g_videoinfo = /* This is the standard, NuttX Plane information object */ -static const struct lcd_planeinfo_s g_planeinfo = +static const struct lcd_planeinfo_s g_planeinfo = { .putrun = rit_putrun, /* Put a run into LCD memory */ .getrun = rit_getrun, /* Get a run from LCD memory */ @@ -301,12 +301,12 @@ static const struct lcd_planeinfo_s g_planeinfo = /* This is the OLED driver instance (only a single device is supported for now) */ -static struct rit_dev_s g_oleddev = +static struct rit_dev_s g_oleddev = { .dev = { /* LCD Configuration */ - + .getvideoinfo = rit_getvideoinfo, .getplaneinfo = rit_getplaneinfo, @@ -429,12 +429,12 @@ static const uint8_t g_setallrow[] = **************************************************************************************/ /************************************************************************************** - * Function: rit_configspi + * Name: rit_configspi * * Description: * Configure the SPI for use with the P14201 * - * Parameters: + * Input Parameters: * spi - Reference to the SPI driver structure * * Returned Value: @@ -443,7 +443,7 @@ static const uint8_t g_setallrow[] = * Assumptions: * **************************************************************************************/ - + static inline void rit_configspi(FAR struct spi_dev_s *spi) { #ifdef CONFIG_P14201_FREQUENCY @@ -467,12 +467,12 @@ static inline void rit_configspi(FAR struct spi_dev_s *spi) } /************************************************************************************** - * Function: rit_select + * Name: rit_select * * Description: * Select the SPI, locking and re-configuring if necessary * - * Parameters: + * Input Parameters: * spi - Reference to the SPI driver structure * * Returned Value: @@ -512,12 +512,12 @@ static void rit_select(FAR struct spi_dev_s *spi) #endif /************************************************************************************** - * Function: rit_deselect + * Name: rit_deselect * * Description: * De-select the SPI * - * Parameters: + * Input Parameters: * spi - Reference to the SPI driver structure * * Returned Value: @@ -545,12 +545,12 @@ static void rit_deselect(FAR struct spi_dev_s *spi) #endif /************************************************************************************** - * Function: rit_sndbytes + * Name: rit_sndbytes * * Description: * Send a sequence of command or data bytes to the SSD1329 controller. * - * Parameters: + * Input Parameters: * spi - Reference to the SPI driver structure * buffer - A reference to memory containing the command bytes to be sent. * buflen - The number of command bytes in buffer to be sent @@ -582,19 +582,19 @@ static void rit_sndbytes(FAR struct rit_dev_s *priv, FAR const uint8_t *buffer, while (buflen-- > 0) { /* Write the next byte to the controller */ - + tmp = *buffer++; (void)SPI_SEND(spi, tmp); } } /************************************************************************************** - * Function: rit_sndcmd + * Name: rit_sndcmd * * Description: * Send multiple commands from a table of commands. * - * Parameters: + * Input Parameters: * spi - Reference to the SPI driver structure * table - A reference to table containing all of the commands to be sent. * @@ -623,9 +623,10 @@ static void rit_sndcmds(FAR struct rit_dev_s *priv, FAR const uint8_t *table) * Name: rit_clear * * Description: - * This method can be used to write a partial raster line to the LCD: + * This method can be used to clear the entire display. * - * rpriv - Reference to private driver structure + * Input Parameters: + * priv - Reference to private driver structure * * Assumptions: * Caller has selected the OLED section. @@ -655,7 +656,7 @@ static inline void rit_clear(FAR struct rit_dev_s *priv) for(row = 0; row < RIT_YRES; row++) { /* Display a horizontal run */ - + rit_snddata(priv, ptr, RIT_XRES / 2); ptr += RIT_XRES / 2; } @@ -682,7 +683,7 @@ static inline void rit_clear(FAR struct rit_dev_s *priv) for(row = 0; row < RIT_YRES; row++) { /* Display a horizontal run */ - + rit_snddata(priv, g_runbuffer, RIT_XRES / 2); } } @@ -692,8 +693,9 @@ static inline void rit_clear(FAR struct rit_dev_s *priv) * Name: rit_putrun * * Description: - * This method can be used to write a partial raster line to the LCD: + * This method can be used to write a partial raster line to the LCD. * + * Input Parameters: * row - Starting row to write to (range: 0 <= row < yres) * col - Starting column to write to (range: 0 <= col <= xres-npixels) * buffer - The buffer containing the run to be written to the LCD @@ -778,7 +780,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, * destination bits 7:4 */ - run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0); + run[aend] = (run[aend] & 0x0f) | (buffer[aend - start] & 0xf0); } } @@ -822,7 +824,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, curr = buffer[i-start]; run[i] = (last << 4) | (curr >> 4); } - + /* An odd number of unaligned pixel have been written (where npixels * may have been as small as one). If npixels was was even, then handle * the final, unaligned pixel. @@ -834,7 +836,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, * destination bits 7:4 */ - run[aend] = (run[aend] & 0x0f) | (curr << 4); + run[aend] = (run[aend] & 0x0f) | (curr << 4); } } @@ -915,6 +917,7 @@ static int rit_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, rit_deselect(priv->spi); } + return OK; } #endif @@ -981,16 +984,16 @@ static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, memcpy(buffer, &run[start], aend - start + 1); } - /* Handle any final pixel (including the special case where npixels == 1). */ + /* Handle any final pixel (including the special case where npixels == 1). */ - if (aend != end) - { - /* The leftmost column is contained in source bits 7:4 and in - * destination bits 7:4 - */ + if (aend != end) + { + /* The leftmost column is contained in source bits 7:4 and in + * destination bits 7:4 + */ - buffer[aend - start] = run[aend] & 0xf0; - } + buffer[aend - start] = run[aend] & 0xf0; + } } else { @@ -1011,7 +1014,7 @@ static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, curr = run[i]; *buffer++ = (last << 4) | (curr >> 4); } - + /* Handle any final pixel (including the special case where npixels == 1). */ if (aend != end) @@ -1020,9 +1023,10 @@ static int rit_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, * destination bits 7:4 */ - *buffer = (curr << 4); + *buffer = (curr << 4); } } + return OK; } #else @@ -1198,13 +1202,11 @@ static int rit_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) * setting at 0 (full off == sleep mode). * * Input Parameters: - * * spi - A reference to the SPI driver instance. * devno - A value in the range of 0 throuh CONFIG_P14201_NINTERFACES-1. This allows * support for multiple OLED devices. * * Returned Value: - * * On success, this function returns a reference to the LCD object for the specified * OLED. NULL is returned on any failure. * @@ -1216,7 +1218,7 @@ FAR struct lcd_dev_s *rit_initialize(FAR struct spi_dev_s *spi, unsigned int dev DEBUGASSERT(devno == 0 && spi); gvdbg("Initializing devno: %d\n", devno); - + /* Driver state data */ priv->spi = spi; diff --git a/include/nuttx/analog/pga11x.h b/include/nuttx/analog/pga11x.h index dc8a8bb957..8b04dee194 100644 --- a/include/nuttx/analog/pga11x.h +++ b/include/nuttx/analog/pga11x.h @@ -76,7 +76,7 @@ * CONFIG_SPI_OWNBUS -- If the PGA117 is enabled, this must be set to 'y' * if the PGA117 is the only device on the SPI bus; * CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE, -* this will enable debug output from the PGA117 driver. + * this will enable debug output from the PGA117 driver. */ #ifndef CONFIG_PGA11X_SPIFREQUENCY