Add structure for LM3S6918
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1754 42af7a65-404d-4744-a932-0658087f49c3
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/************************************************************************************
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* arch/arm/include/lm3s/irq.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* This file should never be included directed but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_LM3S_IRQ_H
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#define __ARCH_ARM_INCLUDE_LM3S_IRQ_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* IRQ numbers. The IRQ number corresponds to the bit number in interrupt registers.
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* This includes all externally generated interrupts (but excludes processor
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* exceptions)
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*/
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#ifdef CONFIG_CHIP_LM3S6918
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/* Vector 0-15: Processor exceptions */
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# define LM3S_IRQ_GPIOA (0) /* Vector 16: GPIO Port A */
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# define LM3S_IRQ_GPIOB (1) /* Vector 17: GPIO Port B */
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# define LM3S_IRQ_GPIOC (2) /* Vector 18: GPIO Port C */
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# define LM3S_IRQ_GPIOD (3) /* Vector 19: GPIO Port D */
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# define LM3S_IRQ_GPIOE (4) /* Vector 20: GPIO Port E */
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# define LM3S_IRQ_UART0 (5) /* Vector 21: UART 0 */
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# define LM3S_IRQ_UART1 (6) /* Vector 22: UART 1 */
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# define LM3S_IRQ_SSI0 (7) /* Vector 23: SSI 0 */
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# define LM3S_IRQ_I2C0 (8) /* Vector 24: I2C 0 */
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/* Vector 25-29: Reserved */
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# define LM3S_IRQ_ADC0 (14) /* Vector 30: ADC Sequence 0 */
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# define LM3S_IRQ_ADC1 (15) /* Vector 31: ADC Sequence 1 */
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# define LM3S_IRQ_ADC2 (16) /* Vector 32: ADC Sequence 2 */
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# define LM3S_IRQ_ADC3 (17) /* Vector 33: ADC Sequence 3 */
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# define LM3S_IRQ_WDOG (18) /* Vector 34: Watchdog Timer */
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# define LM3S_IRQ_TIMER0A (19) /* Vector 35: Timer 0 A */
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# define LM3S_IRQ_TIMER0B (20) /* Vector 36: Timer 0 B */
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# define LM3S_IRQ_TIMER1A (21) /* Vector 37: Timer 1 A */
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# define LM3S_IRQ_TIMER1B (22) /* Vector 38: Timer 1 B */
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# define LM3S_IRQ_TIMER2A (23) /* Vector 39: Timer 2 A */
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# define LM3S_IRQ_TIMER2B (24) /* Vector 40: Timer 3 B */
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# define LM3S_IRQ_COMPARE0 (25) /* Vector 41: Analog Comparator 0 */
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# define LM3S_IRQ_COMPARE1 (26) /* Vector 42: Analog Comparator 1 */
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/* Vector 43: Reserved */
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# define LM3S_IRQ_SYSCON (28) /* Vector 44: System Control */
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# define LM3S_IRQ_FLASHCON (29) /* Vector 45: FLASH Control */
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# define LM3S_IRQ_GPIOF (30) /* Vector 46: GPIO Port F */
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# define LM3S_IRQ_GPIOG (31) /* Vector 47: GPIO Port G */
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# define LM3S_IRQ_GPIOH (32) /* Vector 48: GPIO Port H */
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/* Vector 49: Reserved */
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# define LM3S_IRQ_SSI1 (34) /* Vector 50: SSI 1 */
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# define LM3S_IRQ_TIMER3A (35) /* Vector 51: Timer 3 A */
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# define LM3S_IRQ_TIMER3B (36) /* Vector 52: Timer 3 B */
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# define LM3S_IRQ_I2C1 (37) /* Vector 53: I2C 1 */
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/* Vectors 54-57: Reserved */
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# define LM3S_IRQ_ETHCON (42) /* Vector 58: Ethernet Controller */
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# define LM3S_IRQ_HIBERNATE (43) /* Vector 59: Hibernation Module */
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/* Vectors 60-70: Reserved */
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#else
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# error "IRQ Numbers not specified for this LM3S chip"
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#endif
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#define LM3S_IRQ_SYSTIMER too-be-determined
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#define NR_IRQS (44)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_LM3S_IRQ_H */
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