Improve Cortex-A5 context switching so that a little less copying is done

This commit is contained in:
Gregory Nutt 2013-07-24 07:47:51 -06:00
parent 1b8ae7c530
commit d822f4193f
4 changed files with 15 additions and 3 deletions

View File

@ -93,6 +93,8 @@ CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_HAVE_FPU=y
CONFIG_ARCH_FPU=y
# CONFIG_ARCH_HAVE_MPU is not set
CONFIG_ARCH_HAVE_LOWVECTORS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_PGTABLE_VADDR=0x20000000
# CONFIG_ARCH_ROMPGTABLE is not set
# CONFIG_PAGING is not set

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@ -36,11 +36,14 @@
/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
* This memory configuration, however, loads into the 64 MB SDRAM on board
* the SAMA5D3x-EK which lies at 0x2000:0000
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
* high end of ISRAM for the page table.
*/
MEMORY
{
isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K
isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
}

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@ -33,11 +33,15 @@
*
****************************************************************************/
/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000. */
/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
* high end of ISRAM for the page table.
*/
MEMORY
{
isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K
isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K
}
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")

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@ -60,6 +60,9 @@
* get a link time error saying that the locked region is full, you may have to
* re-organize this memory layout (here and in defconfig) to make the locked
* region even bigger.
*
* NOTE 3: Vectors in low memory are assumed and 16KB of ISRAM is reserved at
* the high end of ISRAM for the page table (?).
*/
MEMORY