sensors: lis2dh: fix hardfault when reading from unconfigured sensor
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73056863ba
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d64d4e02b4
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@ -129,7 +129,7 @@ static int lis2dh_access(FAR struct lis2dh_dev_s *dev,
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uint8_t subaddr, FAR uint8_t *buf, int length);
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static int lis2dh_get_reading(FAR struct lis2dh_dev_s *dev,
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FAR struct lis2dh_vector_s *res, bool force_read);
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static int lis2dh_powerdown(FAR struct lis2dh_dev_s dev);
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static int lis2dh_powerdown(FAR struct lis2dh_dev_s *dev);
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static int lis2dh_reboot(FAR struct lis2dh_dev_s *dev);
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static int lis2dh_poll(FAR struct file *filep,
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FAR struct pollfd *fds, bool setup);
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@ -326,6 +326,20 @@ static ssize_t lis2dh_read(FAR struct file *filep, FAR char *buffer,
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return -EINVAL;
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}
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err = sem_wait(&priv->devsem);
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if (err < 0)
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{
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return -EINTR;
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}
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/* Do not allow read() if no SNIOC_WRITESETUP first. */
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if (!priv->setup)
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{
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lis2dh_dbg("lis2dh: Read from unconfigured device\n");
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return -EINVAL;
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}
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flags = enter_critical_section();
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#ifdef LIS2DH_COUNT_INTS
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if (priv->int_pending > 0)
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@ -342,13 +356,6 @@ static ssize_t lis2dh_read(FAR struct file *filep, FAR char *buffer,
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/* Set pointer to first measurement data */
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ptr = (FAR struct lis2dh_result *)buffer;
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err = sem_wait(&priv->devsem);
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if (err < 0)
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{
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return -EINTR;
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}
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ptr->header.meas_count = 0;
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if (!priv->fifo_used)
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@ -421,9 +428,9 @@ static ssize_t lis2dh_read(FAR struct file *filep, FAR char *buffer,
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fifo_num_samples = (buf & ST_LIS2DH_FIFOSR_NUM_SAMP_MASK) + 1;
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if (fifo_num_samples > readcount)
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if (fifo_num_samples > (readcount - ptr->header.meas_count))
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{
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fifo_num_samples = readcount;
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fifo_num_samples = (readcount - ptr->header.meas_count);
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}
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ptr->header.meas_count +=
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@ -109,8 +109,12 @@ extern "C"
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/* I1_AOI1 ENABLE for INT2 (-X------) */
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#define ST_LIS2DH_CR3_I1_AOI1_ENABLED 0x40 /* AOI1 interrupt on INT1 pin.*/
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#define ST_LIS2DH_CR3_I1_AOI2_ENABLED 0x20 /* AOI2 interrupt on INT1 pin.*/
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#define ST_LIS2DH_CR3_I1_AOI1_ENABLED 0x40 /* AOI1 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_AOI2_ENABLED 0x20 /* AOI2 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_DRDY1 0x10 /* DRDY1 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_DRDY2 0x08 /* DRDY2 interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_WTM 0x04 /* FIFO Watermark interrupt on INT1 pin. */
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#define ST_LIS2DH_CR3_I1_OVERRUN 0x02 /* FIFO Overrun interrupt on INT1 pin. */
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#define ST_LIS2DH_CTRL_REG4 0x23
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