diff --git a/configs/samv71-xult/src/Makefile b/configs/samv71-xult/src/Makefile
index 3942c6b0b5..020b23c56b 100644
--- a/configs/samv71-xult/src/Makefile
+++ b/configs/samv71-xult/src/Makefile
@@ -42,6 +42,10 @@ AOBJS = $(ASRCS:.S=$(OBJEXT))
 
 CSRCS = sam_boot.c
 
+ifeq ($(CONFIG_SAMA5_SDRAMC),y)
+CSRCS += sam_sdram.c
+endif
+
 ifeq ($(CONFIG_NSH_ARCHINIT),y)
 CSRCS += sam_nsh.c sam_bringup.c
 else ifeq ($(CONFIG_BOARD_INITIALIZE),y)
diff --git a/configs/samv71-xult/src/samv71-xult.h b/configs/samv71-xult/src/samv71-xult.h
index d69b199309..93aab74684 100644
--- a/configs/samv71-xult/src/samv71-xult.h
+++ b/configs/samv71-xult/src/samv71-xult.h
@@ -268,6 +268,30 @@
  * Public Functions
  ************************************************************************************/
 
+/************************************************************************************
+ * Name: sam_sdram_config
+ *
+ * Description:
+ *   Configures the on-board SDRAM.  SAMV71 Xplained Ultra features one external
+ *   IS42S16100E-7BLI, 512Kx16x2, 10ns, SDRAM. SDRAM0 is connected to chip select
+ *   NCS1.
+ *
+ *  Input Parameters:
+ *     None
+ *
+ *  Assumptions:
+ *    The DDR memory regions is configured as strongly ordered memory.  When we
+ *    complete initialization of SDRAM and it is ready for use, we will make DRAM
+ *    into normal memory.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_SAMA5_SDRAMC
+void sam_sdram_config(void);
+#else
+#  define sam_sdram_config(t)
+#endif
+
 /************************************************************************************
  * Name: sam_bringup
  *