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Typo fix

This commit is contained in:
Gregory Nutt 2015-06-10 12:31:42 -06:00
parent 8e21bac5d4
commit d519436eac
1 changed files with 4 additions and 3 deletions
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7
configs/teensy-3.x/include/board.h
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@ -58,8 +58,9 @@
#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */ #define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */
/* PLL Configuration. NOTE: Only even frequency crystals are supported that will /* PLL Configuration. NOTE: Only even frequency crystals are supported that will
* produce a 2MHz reference clock to the PLL. The rated speed is 72MHz, but can * produce a 2MHz reference clock to the PLL. The rated speed for the MK20DX256VLH7
* be overclocked at 96MHz * is 72MHz and 50MHz for the MK20DX128VLH5, but according to the PJRC website,
* both can be overclocked at 96MHz
* *
* 48MHz (rated 50MHz) * 48MHz (rated 50MHz)
* *
@ -79,7 +80,7 @@
* MCG Frequency: PLLOUT = 96MHz * MCG Frequency: PLLOUT = 96MHz
*/ */
#if defiend(CONFIG_TEENSY_3X_OVERCLOCK) #if defined(CONFIG_TEENSY_3X_OVERCLOCK)
/* PLL Configuration */ /* PLL Configuration */
# define BOARD_PRDIV 1 /* PLL External Reference Divider */ # define BOARD_PRDIV 1 /* PLL External Reference Divider */