From ce8fb54d071ff1c39c3eafd1e8e6b3e4f79b96c9 Mon Sep 17 00:00:00 2001 From: Nathan Hartman Date: Tue, 3 Sep 2019 17:00:22 -0600 Subject: [PATCH] Fix various typos --- boards/arm/lpc43xx/bambino-200e/README.txt | 2 +- boards/arm/stm32/mikroe-stm32f4/README.txt | 2 +- boards/arm/stm32/stm3220g-eval/README.txt | 2 +- boards/arm/stm32/stm3240g-eval/README.txt | 4 ++-- boards/arm/stm32/stm32f3discovery/README.txt | 6 +++--- boards/arm/stm32/stm32f429i-disco/README.txt | 4 ++-- boards/arm/stm32/stm32f4discovery/README.txt | 6 +++--- tools/Config.mk | 4 ++-- 8 files changed, 15 insertions(+), 15 deletions(-) diff --git a/boards/arm/lpc43xx/bambino-200e/README.txt b/boards/arm/lpc43xx/bambino-200e/README.txt index cc129387aa..f836311100 100644 --- a/boards/arm/lpc43xx/bambino-200e/README.txt +++ b/boards/arm/lpc43xx/bambino-200e/README.txt @@ -99,7 +99,7 @@ ports. 2. Lazy Floating Point Register Save. - An alternative mplementation only saves and restores FPU registers only + An alternative implementation only saves and restores FPU registers only on context switches. This means: (1) floating point registers are not stored on each context switch and, hence, possibly better interrupt performance. But, (2) since floating point registers are not saved, diff --git a/boards/arm/stm32/mikroe-stm32f4/README.txt b/boards/arm/stm32/mikroe-stm32f4/README.txt index 98e6026d57..17bb36c373 100644 --- a/boards/arm/stm32/mikroe-stm32f4/README.txt +++ b/boards/arm/stm32/mikroe-stm32f4/README.txt @@ -141,7 +141,7 @@ There are two version of the FPU support built into the STM32 port. 2. Lazy Floating Point Register Save. - An alternative mplementation only saves and restores FPU registers only + An alternative implementation only saves and restores FPU registers only on context switches. This means: (1) floating point registers are not stored on each context switch and, hence, possibly better interrupt performance. But, (2) since floating point registers are not saved, diff --git a/boards/arm/stm32/stm3220g-eval/README.txt b/boards/arm/stm32/stm3220g-eval/README.txt index 301aebffe9..c87222ca51 100644 --- a/boards/arm/stm32/stm3220g-eval/README.txt +++ b/boards/arm/stm32/stm3220g-eval/README.txt @@ -677,7 +677,7 @@ Where is one of the following: The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you - should also add the fillowing to the configuration file: + should also add the following to the configuration file: CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 diff --git a/boards/arm/stm32/stm3240g-eval/README.txt b/boards/arm/stm32/stm3240g-eval/README.txt index 88b40298d4..998744c763 100644 --- a/boards/arm/stm32/stm3240g-eval/README.txt +++ b/boards/arm/stm32/stm3240g-eval/README.txt @@ -166,7 +166,7 @@ There are two version of the FPU support built into the STM32 port. 2. Lazy Floating Point Register Save. - An alternative mplementation only saves and restores FPU registers only + An alternative implementation only saves and restores FPU registers only on context switches. This means: (1) floating point registers are not stored on each context switch and, hence, possibly better interrupt performance. But, (2) since floating point registers are not saved, @@ -985,7 +985,7 @@ Where is one of the following: The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you - should also add the fillowing to the configuration file: + should also add the following to the configuration file: CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 diff --git a/boards/arm/stm32/stm32f3discovery/README.txt b/boards/arm/stm32/stm32f3discovery/README.txt index d706b374e9..77c0ede7e1 100644 --- a/boards/arm/stm32/stm32f3discovery/README.txt +++ b/boards/arm/stm32/stm32f3discovery/README.txt @@ -100,7 +100,7 @@ There are two version of the FPU support built into the STM32 port. 2. Lazy Floating Point Register Save. - An alternative mplementation only saves and restores FPU registers only + An alternative implementation only saves and restores FPU registers only on context switches. This means: (1) floating point registers are not stored on each context switch and, hence, possibly better interrupt performance. But, (2) since floating point registers are not saved, @@ -478,8 +478,8 @@ Where is one of the following: CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, - has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you - should also add the fillowing to the configuration file: + has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you + should also add the following to the configuration file: CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 diff --git a/boards/arm/stm32/stm32f429i-disco/README.txt b/boards/arm/stm32/stm32f429i-disco/README.txt index adc4bd5871..22cb4f93d1 100644 --- a/boards/arm/stm32/stm32f429i-disco/README.txt +++ b/boards/arm/stm32/stm32f429i-disco/README.txt @@ -268,7 +268,7 @@ There are two version of the FPU support built into the STM32 port. 2. Lazy Floating Point Register Save. - An alternative mplementation only saves and restores FPU registers only + An alternative implementation only saves and restores FPU registers only on context switches. This means: (1) floating point registers are not stored on each context switch and, hence, possibly better interrupt performance. But, (2) since floating point registers are not saved, @@ -776,7 +776,7 @@ Where is one of the following: The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you - should also add the fillowing to the configuration file: + should also add the following to the configuration file: CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 diff --git a/boards/arm/stm32/stm32f4discovery/README.txt b/boards/arm/stm32/stm32f4discovery/README.txt index 0141c242cc..bf8da1f914 100644 --- a/boards/arm/stm32/stm32f4discovery/README.txt +++ b/boards/arm/stm32/stm32f4discovery/README.txt @@ -321,7 +321,7 @@ There are two version of the FPU support built into the STM32 port. 2. Lazy Floating Point Register Save. - An alternative mplementation only saves and restores FPU registers only + An alternative implementation only saves and restores FPU registers only on context switches. This means: (1) floating point registers are not stored on each context switch and, hence, possibly better interrupt performance. But, (2) since floating point registers are not saved, @@ -1783,8 +1783,8 @@ Configuration Sub-directories CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both) The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result, - has a maximum timeout value of 49 milliseconds. for WWDG watchdog, you - should also add the fillowing to the configuration file: + has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you + should also add the following to the configuration file: CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20 CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49 diff --git a/tools/Config.mk b/tools/Config.mk index 316e5a01ad..4a5c8e7e45 100644 --- a/tools/Config.mk +++ b/tools/Config.mk @@ -76,7 +76,7 @@ endif # they contain spaces or any other characters that might get mangled by the # shell # -# Depends on this setting passed as a make commaond line definition from the +# Depends on this setting passed as a make command line definition from the # toplevel Makefile: # # TOPDIR - The path to the top level NuttX directory in the form @@ -302,7 +302,7 @@ endif # # USAGE: FILELIST = $(call RWILDCARD,, -name }