arch/arm: Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
parent
eeb8931c04
commit
bfbe705e3f
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@ -122,16 +122,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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* the signals have been delivered.
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*/
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tcb->xcp.sigdeliver = sigdeliver;
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tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
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tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
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tcb->xcp.sigdeliver = sigdeliver;
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tcb->xcp.saved_pc = CURRENT_REGS[REG_PC];
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tcb->xcp.saved_cpsr = CURRENT_REGS[REG_CPSR];
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/* Then set up to vector to the trampoline with interrupts
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* disabled
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*/
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CURRENT_REGS[REG_PC] = (uint32_t)arm_sigdeliver;
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CURRENT_REGS[REG_CPSR] = PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT;
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CURRENT_REGS[REG_PC] = (uint32_t)arm_sigdeliver;
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CURRENT_REGS[REG_CPSR] = PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT;
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/* And make sure that the saved context in the TCB
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* is the same as the interrupt return context.
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@ -114,23 +114,23 @@ void up_irqinitialize(void)
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(*(volatile uint32_t *)0x98100008) |= 0x4;
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(*(volatile uint32_t *)0x98800100) = 0xDFF8003F;
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(*(volatile uint32_t *)0x98800100) = 0xdff8003f;
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/* Check board type */
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/* Mask all interrupts off */
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putreg32(0, IRQ_REG(IRQ__MASK));
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putreg32(0, IRQ_REG(IRQ__MASK+0x20));
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putreg32(0, IRQ_REG(IRQ__MASK + 0x20));
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putreg32(0xffffffff, IRQ_REG(IRQ__CLEAR));
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putreg32(0xffffffff, IRQ_REG(IRQ__CLEAR+0x20));
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putreg32(0xffffffff, IRQ_REG(IRQ__CLEAR + 0x20));
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/* Initial trigger mode and level */
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putreg32(0, IRQ_REG(IRQ__MODE));
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putreg32(0, IRQ_REG(IRQ__LEVEL));
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putreg32(0, IRQ_REG(IRQ__MODE+0x20));
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putreg32(0, IRQ_REG(IRQ__LEVEL+0x20));
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putreg32(0, IRQ_REG(IRQ__MODE + 0x20));
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putreg32(0, IRQ_REG(IRQ__LEVEL + 0x20));
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/* currents_regs is non-NULL only while processing an interrupt */
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@ -147,10 +147,10 @@ void up_irqinitialize(void)
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getreg32(0x98400030), getreg32(0x98400034), getreg32(0x98400038),
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getreg32(0x98400004), getreg32(0x98400000), getreg32(0x98400008));
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irqinfo("IRQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
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getreg32(0x98800014), getreg32(0x98800004), getreg32(0x9880000C),
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getreg32(0x98800014), getreg32(0x98800004), getreg32(0x9880000c),
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getreg32(0x98800010));
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irqinfo("FIQ STATUS=%08x MASK=%08x MODE=%08x LEVEL=%08x\n",
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getreg32(0x98800034), getreg32(0x98800024), getreg32(0x9880002C),
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getreg32(0x98800034), getreg32(0x98800024), getreg32(0x9880002c),
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getreg32(0x98800020));
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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@ -262,7 +262,8 @@ void up_enable_irq(int irq)
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static int ffs(uint32_t word)
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{
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int t, r;
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int t;
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int r;
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if (word == 0)
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{
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@ -299,7 +300,8 @@ void arm_ack_irq(int irq)
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uint32_t *arm_decodeirq(uint32_t *regs)
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{
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uint32_t num, status;
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uint32_t num;
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uint32_t status;
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/* Detect & deliver the IRQ */
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