Added I2C register bit definitions
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1673 42af7a65-404d-4744-a932-0658087f49c3
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@ -164,6 +164,31 @@
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#define Z8_UARTMDSEL_HWREV HX(e0) /* Bits 5-7=7: LIN-UART Hardware Revision */
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/* Bits 0-4: Mode dependent status */
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/* I2C Status Register Bit Definitions **********************************************/
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#if defined(_Z8FMC16) || defined(_Z8F1680)
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#else
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# define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NACK Interrupt */
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# define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */
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# define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */
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# define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */
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# define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */
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# define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */
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# define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
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# define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
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#endif
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/* I2C Control Register Bit Definitions *********************************************/
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#define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */
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#define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */
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#define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */
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#define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */
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#define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */
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#define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */
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#define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */
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#define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */
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/* Register access macros ***********************************************************
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*
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* The register access mechanism provided in ez8.h differs from the useful in other
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