ESP32: Fix a couple of bugs associated with handling of CPU interrupts.

This commit is contained in:
Gregory Nutt 2016-12-14 13:30:07 -06:00
parent b504b8daff
commit b5e979d58f
3 changed files with 16 additions and 10 deletions

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@ -378,7 +378,7 @@
#define ESP32_CPUINT_NEDGEPERIPHS 4 #define ESP32_CPUINT_NEDGEPERIPHS 4
#define EPS32_CPUINT_EDGESET 0x50400400 #define EPS32_CPUINT_EDGESET 0x50400400
#define ESP32_CPUINT_NNMIPERIPHS 4 #define ESP32_CPUINT_NNMIPERIPHS 1
#define EPS32_CPUINT_NMISET 0x00004000 #define EPS32_CPUINT_NMISET 0x00004000
#define ESP32_CPUINT_TIMER0 6 #define ESP32_CPUINT_TIMER0 6
@ -388,11 +388,11 @@
#define ESP32_CPUINT_TIMER2 16 #define ESP32_CPUINT_TIMER2 16
#define ESP32_CPUINT_SOFTWARE1 29 #define ESP32_CPUINT_SOFTWARE1 29
#define ESP32_CPUINT_NINTERNAL 5 #define ESP32_CPUINT_NINTERNAL 6
#define ESP32_CPUINT_MAX 31 #define ESP32_CPUINT_MAX 31
#define EPS32_CPUINT_PERIPHSET 0xdffe6f3f #define EPS32_CPUINT_PERIPHSET 0xdffe773f
#define EPS32_CPUINT_INTERNALSET 0x200180c0 #define EPS32_CPUINT_INTERNALSET 0x200188c0
/* Priority 1: 0-10, 12-13, 17-18 (15) /* Priority 1: 0-10, 12-13, 17-18 (15)
* Priority 2: 19-21 (3) * Priority 2: 19-21 (3)

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@ -165,9 +165,11 @@ static uint32_t g_intenable[1];
#endif #endif
/* Bitsets for free, unallocated CPU interrupts */ /* Bitsets for free, unallocated CPU interrupts available to peripheral
* devices.
*/
static uint32_t g_free_cpuints = 0xffffffff; static uint32_t g_free_cpuints = EPS32_CPUINT_PERIPHSET;
/* Bitsets for each interrupt priority 1-5 */ /* Bitsets for each interrupt priority 1-5 */
@ -188,7 +190,9 @@ static const uint32_t g_priority[5] =
* Name: esp32_alloc_cpuint * Name: esp32_alloc_cpuint
* *
* Description: * Description:
* Allocate a CPU interrupt * Allocate a CPU interrupt for a peripheral device. This function will
* not allocate any of the pre-allocated CPU interrupts for internal
* devices.
* *
* Input Parameters: * Input Parameters:
* intmask - mask of candidate CPU interrupts. The CPU interrupt will be * intmask - mask of candidate CPU interrupts. The CPU interrupt will be
@ -224,7 +228,7 @@ int esp32_alloc_cpuint(uint32_t intmask)
*/ */
for (cpuint = 0, bitmask = 0xff; for (cpuint = 0, bitmask = 0xff;
cpuint <= ESP32_CPUINT_MAX; cpuint <= ESP32_CPUINT_MAX && (intset & bitmask) == 0;
cpuint += 8, bitmask <<= 8); cpuint += 8, bitmask <<= 8);
/* Search for an unallocated CPU interrupt number in the remaining /* Search for an unallocated CPU interrupt number in the remaining

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@ -455,8 +455,8 @@ static void esp32_disableallints(struct esp32_dev_s *priv, uint32_t *intena)
static int esp32_setup(struct uart_dev_s *dev) static int esp32_setup(struct uart_dev_s *dev)
{ {
struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
#ifndef CONFIG_SUPPRESS_UART_CONFIG #ifndef CONFIG_SUPPRESS_UART_CONFIG
struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
uint32_t clkdiv; uint32_t clkdiv;
uint32_t regval; uint32_t regval;
uint32_t conf0; uint32_t conf0;
@ -655,7 +655,9 @@ static int esp32_attach(struct uart_dev_s *dev)
priv->cpuint = esp32_alloc_levelint(1); priv->cpuint = esp32_alloc_levelint(1);
if (priv->cpuint < 0) if (priv->cpuint < 0)
{ {
ret = priv->cpuint; /* Failed to allocate a CPU interrupt of this type */
return priv->cpuint;
} }
/* Set up to receive peripheral interrupts on the current CPU */ /* Set up to receive peripheral interrupts on the current CPU */