Merged in jjlange/nuttx/lpc17_ethupdates (pull request #847)
Added support for KSZ8081RNA PHY to LPC17xx Ethernet driver. * Added support for KSZ8081RNA PHY to LPC17xx Ethernet driver. * Updated PHY error message Approved-by: Gregory Nutt <gnutt@nuttx.org>
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@ -199,6 +199,11 @@
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# define LPC17_PHYID1 MII_PHYID1_LAN8720
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# define LPC17_PHYID2 MII_PHYID2_LAN8720
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# define LPC17_HAVE_PHY 1
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#elif defined(CONFIG_ETH0_PHY_KSZ8081)
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# define LPC17_PHYNAME "KSZ8081"
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# define LPC17_PHYID1 MII_PHYID1_KSZ8081
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# define LPC17_PHYID2 MII_PHYID2_KSZ8081
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# define LPC17_HAVE_PHY 1
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#else
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# warning "No PHY specified!"
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# undef LPC17_HAVE_PHY
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@ -2436,7 +2441,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
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* latches different at different addresses.
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*/
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for (phyaddr = 1; phyaddr < 32; phyaddr++)
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for (phyaddr = 0; phyaddr < 32; phyaddr++)
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{
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/* Check if we can see the selected device ID at this
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* PHY address.
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@ -2587,7 +2592,29 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
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nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
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return -ENODEV;
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}
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#elif defined(CONFIG_ETH0_PHY_KSZ8081)
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phyreg = lpc17_phyread(phyaddr, MII_KSZ8081_PHYCTRL1);
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switch (phyreg & MII_PHYCTRL1_MODE_MASK)
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{
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case MII_PHYCTRL1_MODE_10HDX: /* 10BASE-T half duplex */
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priv->lp_mode = LPC17_10BASET_HD;
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lpc17_putreg(0, LPC17_ETH_SUPP);
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break;
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case MII_PHYCTRL1_MODE_100HDX: /* 100BASE-T half duplex */
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priv->lp_mode = LPC17_100BASET_HD;
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break;
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case MII_PHYCTRL1_MODE_10FDX: /* 10BASE-T full duplex */
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priv->lp_mode = LPC17_10BASET_FD;
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lpc17_putreg(0, LPC17_ETH_SUPP);
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break;
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case MII_PHYCTRL1_MODE_100FDX: /* 100BASE-T full duplex */
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priv->lp_mode = LPC17_100BASET_FD;
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break;
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default:
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nerr("ERROR: Unrecognized mode: %04x\n", phyreg);
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return -ENODEV;
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}
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#elif defined(CONFIG_ETH0_PHY_DP83848C)
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phyreg = lpc17_phyread(phyaddr, MII_DP83848C_STS);
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