arch/intel64: fix IRQ conflict with GOLDFISH
Also move MSI IRQ definition to place where other IRQ definitions are. Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
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@ -346,10 +346,18 @@
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#define HPET0_IRQ IRQ2
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#define HPET0_IRQ IRQ2
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#define HPET1_IRQ IRQ8
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#define HPET1_IRQ IRQ8
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/* Use IRQ15 IRQ16 for SMP */
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/* NuttX custom interrupts configuration starts from here.
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* IRQ16-IRQ23 are reserved for GOLDFISH so we start from IRQ24.
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*/
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#define SMP_IPI_IRQ IRQ15
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/* Use IRQ24 IRQ25 for SMP */
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#define SMP_IPI_ASYNC_IRQ IRQ16
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#define SMP_IPI_IRQ IRQ24
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#define SMP_IPI_ASYNC_IRQ IRQ25
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/* Use IRQ32 and above for MSI */
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#define IRQ_MSI_START IRQ32
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/* Common register save structure created by up_saveusercontext() and by
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/* Common register save structure created by up_saveusercontext() and by
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* ISR/IRQ interrupt processing.
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* ISR/IRQ interrupt processing.
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@ -48,7 +48,6 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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#define IRQ_MSI_START IRQ32
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#define X86_64_MAR_DEST 0xfee00000
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#define X86_64_MAR_DEST 0xfee00000
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#define X86_64_MDR_TYPE 0x4000
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#define X86_64_MDR_TYPE 0x4000
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