SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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@ -318,7 +318,7 @@ Writing to FLASH using SAM-BA
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1. Exit the terminal emulation program and remove the USB cable from
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the DBGU port (J14)
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2. Connect the USB cable to the device USB port (J20)
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3. JP9 must open so that (BMS == 1) to boot from on-chip Boot ROM
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3. JP9 must open (BMS == 1) to boot from on-chip Boot ROM.
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4. Press and maintain PB4 CS_BOOT button and power up the board. PB4
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CS_BOOT button prevents booting from Nand or serial Flash by
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disabling Flash Chip Selects after having powered the board, you can
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@ -332,7 +332,9 @@ Writing to FLASH using SAM-BA
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9. When you are finished writing to FLASH, remove the USB cable from J20
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and re-connect the serial link on USB CDC / DBGU connector (J14) and
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re-open the terminal emulator program.
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10. Power cycle the board.
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10. If you loaded code in NOR flash (CS0), then you will need to close
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JP9 (BMS == 0) to force booting out of NOR flash (see NOTE).
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11. Power cycle the board.
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NOTES: By closing JP9 (BMS == 0), you can force the board to boot
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directly to NOR FLASH. Executing from other memories will require that
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@ -688,12 +690,15 @@ Configurations
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CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
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CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
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3. This configuration executes out of internal SRAM an can only
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3. This configuration executes out of internal SRAM and can only
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be loaded via JTAG.
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CONFIG_SAMA5_BOOT_ISRAM=y : Boot into internal SRAM
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CONFIG_BOOT_RUNFROMISRAM=y : Run from internal SRAM
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STATUS:
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2013-7-28: This configuration was verified functional.
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ostest:
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This configuration directory, performs a simple OS test using
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examples/ostest.
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@ -714,16 +719,17 @@ Configurations
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CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
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CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
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3. This configuration executes out of internal SRAM an can only
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be loaded via JTAG.
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3. This configuration executes out of CS0 NOR flash and can only
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be loaded via JTAG. 128MB
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CONFIG_SAMA5_BOOT_ISRAM=y : Boot into internal SRAM
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CONFIG_BOOT_RUNFROMISRAM=y : Run from internal SRAM
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CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0
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CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM)
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CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory
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CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB
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CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH
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NOTE: In order to boot in this configuration, you need to close the
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BMS jumper.
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STATUS:
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2013-7-26: This ostest configuration is too large to fit in SAMA5
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internal SRAM (along with a usable heap and a 16KB page table).
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I do not want to simplify this test because I will, eventually,
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need to do the entire OS test. But I will need to configure this
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to run out of FLASH or SDRAM in this future. For now, I created
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the smaller 'hello' configuration for the basic bringup.
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@ -44,7 +44,7 @@ ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
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LDSCRIPT = ddram.ld
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endif
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ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y)
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# LDSCRIPT = cs0flash.ld
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LDSCRIPT = norflash.ld
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endif
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ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y)
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# LDSCRIPT = cs1flash.ld
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@ -217,6 +217,15 @@
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#define BUTTON_USER1_BIT (1 << BUTTON_USER1)
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/************************************************************************************
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* Assembly Language Macros
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************************************************************************************/
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#ifdef __ASSEMBLY__
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.macro config_sdram
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.endm
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#endif /* __ASSEMBLY__ */
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/************************************************************************************
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* Public Data
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************************************************************************************/
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@ -309,5 +318,5 @@ xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* !__ASSEMBLY__ */
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#endif /* __CONFIGS_SAMA5D3X_EK_INCLUDE_BOARD_H */
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@ -44,7 +44,7 @@ ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
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LDSCRIPT = ddram.ld
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endif
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ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y)
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# LDSCRIPT = cs0flash.ld
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LDSCRIPT = norflash.ld
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endif
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ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y)
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# LDSCRIPT = cs1flash.ld
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@ -168,15 +168,26 @@ CONFIG_SAMA5_USART1=y
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# External Memory Configuration
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#
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# CONFIG_SAMA5_DDRCS is not set
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# CONFIG_SAMA5_EBICS0 is not set
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CONFIG_SAMA5_EBICS0=y
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CONFIG_SAMA5_EBICS0_SIZE=134217728
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# CONFIG_SAMA5_EBICS0_SRAM is not set
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# CONFIG_SAMA5_EBICS0_PSRAM is not set
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# CONFIG_SAMA5_EBICS0_PROM is not set
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# CONFIG_SAMA5_EBICS0_EEPROM is not set
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# CONFIG_SAMA5_EBICS0_EPROM is not set
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# CONFIG_SAMA5_EBICS0_LCD is not set
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CONFIG_SAMA5_EBICS0_NOR=y
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# CONFIG_SAMA5_EBICS0_NAND is not set
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# CONFIG_SAMA5_EBICS1 is not set
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# CONFIG_SAMA5_EBICS2 is not set
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# CONFIG_SAMA5_EBICS3 is not set
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CONFIG_SAMA5_BOOT_ISRAM=y
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# CONFIG_SAMA5_BOOT_ISRAM is not set
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CONFIG_SAMA5_BOOT_CS0FLASH=y
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#
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# Heap Configuration
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#
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CONFIG_SAMA5_ISRAM_HEAP=y
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#
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# Architecture Options
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@ -199,9 +210,6 @@ CONFIG_ARCH_STACKDUMP=y
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#
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CONFIG_BOARD_LOOPSPERMSEC=16717
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# CONFIG_ARCH_CALIBRATION is not set
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CONFIG_RAM_START=0x00300000
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CONFIG_RAM_VSTART=0x00300000
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CONFIG_RAM_SIZE=114688
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CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
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CONFIG_ARCH_INTERRUPTSTACK=0
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@ -209,11 +217,21 @@ CONFIG_ARCH_INTERRUPTSTACK=0
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# Boot options
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#
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# CONFIG_BOOT_RUNFROMEXTSRAM is not set
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# CONFIG_BOOT_RUNFROMFLASH is not set
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CONFIG_BOOT_RUNFROMISRAM=y
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CONFIG_BOOT_RUNFROMFLASH=y
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# CONFIG_BOOT_RUNFROMISRAM is not set
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# CONFIG_BOOT_RUNFROMSDRAM is not set
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# CONFIG_BOOT_COPYTORAM is not set
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#
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# Boot Memory Configuration
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#
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CONFIG_RAM_START=0x00304000
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CONFIG_RAM_VSTART=0x00304000
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CONFIG_RAM_SIZE=114688
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CONFIG_FLASH_START=0x1000000
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CONFIG_FLASH_VSTART=0x1000000
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CONFIG_FLASH_SIZE=134217728
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#
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# Board Selection
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#
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@ -91,8 +91,6 @@ SECTIONS
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} > sdram
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PROVIDE_HIDDEN (__exidx_end = .);
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_eronly = ABSOLUTE(.);
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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@ -88,8 +88,6 @@ SECTIONS
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} > isram
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PROVIDE_HIDDEN (__exidx_end = .);
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_eronly = ABSOLUTE(.);
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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@ -0,0 +1,127 @@
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/****************************************************************************
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* configs/sama5d3x-ek/scripts/norflash.ld
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* The SAMA5D3x-EK has 128MB of NOR flash at CS0 (0x1000:0000). In this
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* configuration, the .text and a copy of the .data section will be loaded
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* into NOR flash. NuttX .data, .bss, the IDLE stack, and the primary
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* heap will be allocated in SRAM. The SAMA5D3 has 128 KB of ISRAM beginning
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* at virtual address 0x0030:0000.
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*
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* Vectors in low memory are assumed to reside at the beginning of NOR flash
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* 16KB of ISRAM is reserved at the beginning of ISRAM for the page table.
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*/
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MEMORY
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{
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norflash (W!RX) : ORIGIN = 0x10000000, LENGTH = 128M
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isram (WRX!) : ORIGIN = 0x00304000, LENGTH = 128K - 16K
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}
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(entry)
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ENTRY(_stext)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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*(.ARM.extab*)
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*(.gnu.linkonce.armextab.*)
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_etext = ABSOLUTE(.);
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} > norflash
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.init_section : {
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > norflash
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.ARM.extab : {
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*(.ARM.extab*)
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} > norflash
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > norflash
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PROVIDE_HIDDEN (__exidx_end = .);
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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_edata = ABSOLUTE(.);
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} > isram AT > norflash
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_eronly = LOADADDR(.data);
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.bss : {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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_ebss = ABSOLUTE(.);
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} > isram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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@ -110,8 +110,6 @@ SECTIONS
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} > isram
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PROVIDE_HIDDEN (__exidx_end = .);
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_eronly = ABSOLUTE(.);
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.paged : {
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_spaged = ABSOLUTE(.);
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*(.text .text.*)
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