arch/arm/src/stm32: While we are at it and the differences are fresh in mind, add support for the rest of the STM32F401 family.
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@ -1839,8 +1839,22 @@
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# define STM32_NDCMI 0 /* (0) No digital camera interface (DCMI) */
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/* STM23 F4 Family ******************************************************************/
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/* STM32F01xB/C Family Differences:
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*
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* PART PACKAGE FLASH SDIO ADC Channels
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* ----------- ---------------- ----- ---- ------------
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* STM32F401CB WLCSP49/UFQFPN48 128Kb No 10
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* STM32F401RB LQFP64 128Kb Yes 16
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* STM32F401VB UFBGA100/LQFP100 128Kb Yes 16
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* STM32F401CC WLCSP49/UFQFPN48 256Kb No 10
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* STM32F401RC LQFP64 256Kb Yes 16
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* STM32F401VC UFBGA100/LQFP100 256Kb Yes 16
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*/
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#elif defined(CONFIG_ARCH_CHIP_STM32F401CB) || defined(CONFIG_ARCH_CHIP_STM32F401RB) || \
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defined(CONFIG_ARCH_CHIP_STM32F401VB) || defined(CONFIG_ARCH_CHIP_STM32F401CC) || \
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defined(CONFIG_ARCH_CHIP_STM32F401RC) || defined(CONFIG_ARCH_CHIP_STM32F401VC)
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#elif defined(CONFIG_ARCH_CHIP_STM32F401RC) /* LQFP64 package, 256Kb FLASH, 64Kb SRAM */
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# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
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# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
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# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
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@ -1867,11 +1881,15 @@
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# define STM32_NUSART 3 /* USART1, 2 and 6 */
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# define STM32_NI2C 3 /* I2C1-3 */
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# define STM32_NCAN 0 /* No CAN */
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# define STM32_NSDIO 1 /* One SDIO interface */
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# if defined(CONFIG_ARCH_CHIP_STM32F401CB) || defined(CONFIG_ARCH_CHIP_STM32F401CC)
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# define STM32_NSDIO 0 /* No SDIO interface */
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# else
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# define STM32_NSDIO 1 /* One SDIO interface */
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# endif
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# define STM32_NLCD 0 /* No LCD */
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# define STM32_NUSBOTG 1 /* USB OTG FS (only) */
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# define STM32_NGPIO 50 /* GPIOA-H */
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# define STM32_NADC 1 /* One 12-bit ADC1, 16 channels */
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# define STM32_NADC 1 /* One 12-bit ADC1, 10 or 16 channels */
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# define STM32_NDAC 0 /* No DAC */
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# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
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# define STM32_NCRC 1 /* No CRC */
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@ -1879,7 +1897,22 @@
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# define STM32_NRNG 0 /* No Random number generator (RNG) */
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# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
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#elif defined(CONFIG_ARCH_CHIP_STM32F401RE) /* LQFP64 package, 512Kb FLASH, 96KiB SRAM */
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/* STM32F01xD/E Family Differences:
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*
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* PART PACKAGE FLASH SDIO ADC Channels
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* ----------- ---------------- ----- ---- ------------
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* STM32F401CD WLCSP49/UFQFPN48 384Kb No 10
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* STM32F401RD LQFP64 384Kb Yes 16
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* STM32F401VD UFBGA100/LQFP100 384Kb Yes 16
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* STM32F401CE WLCSP49/UFQFPN48 512Kb No 10
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* STM32F401RE LQFP64 512Kb Yes 16
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* STM32F401VE UFBGA100/LQFP100 512Kb Yes 16
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*/
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#elif defined(CONFIG_ARCH_CHIP_STM32F401CD) || defined(CONFIG_ARCH_CHIP_STM32F401RD) || \
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defined(CONFIG_ARCH_CHIP_STM32F401VD) || defined(CONFIG_ARCH_CHIP_STM32F401CE) || \
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defined(CONFIG_ARCH_CHIP_STM32F401RE) || defined(CONFIG_ARCH_CHIP_STM32F401VE)
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# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
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# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
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# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
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@ -1906,11 +1939,15 @@
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# define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */
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# define STM32_NI2C 3 /* I2C1-3 */
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# define STM32_NCAN 0 /* No CAN */
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# define STM32_NSDIO 1 /* One SDIO interface */
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# if defined(CONFIG_ARCH_CHIP_STM32F401CD) || defined(CONFIG_ARCH_CHIP_STM32F401CE)
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# define STM32_NSDIO 0 /* No SDIO interface */
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# else
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# define STM32_NSDIO 1 /* One SDIO interface */
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# endif
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# define STM32_NLCD 0 /* No LCD */
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# define STM32_NUSBOTG 1 /* USB OTG FS (only) */
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# define STM32_NGPIO 50 /* GPIOA-H */
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# define STM32_NADC 1 /* One 12-bit ADC1, 16 channels */
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# define STM32_NADC 1 /* One 12-bit ADC1, 10 or 16 channels */
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# define STM32_NDAC 0 /* No DAC */
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# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
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# define STM32_NCRC 1 /* No CRC */
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@ -965,6 +965,38 @@ config ARCH_CHIP_STM32F373VC
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select STM32_STM32F37XX
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401CB
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bool "STM32F401CB"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xBC
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401RB
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bool "STM32F401RB"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xBC
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401VB
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bool "STM32F401VB"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xBC
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401CC
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bool "STM32F401CC"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xBC
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401RC
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bool "STM32F401RC"
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select ARCH_CORTEXM4
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@ -973,6 +1005,46 @@ config ARCH_CHIP_STM32F401RC
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401VC
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bool "STM32F401VC"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xBC
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401CD
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bool "STM32F401CD"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xDE
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401RD
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bool "STM32F401RD"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xDE
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401VD
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bool "STM32F401VD"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xDE
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401CE
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bool "STM32F401CE"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xDE
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401RE
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bool "STM32F401RE"
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select ARCH_CORTEXM4
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@ -981,6 +1053,14 @@ config ARCH_CHIP_STM32F401RE
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F401VE
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bool "STM32F401VE"
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select ARCH_CORTEXM4
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select STM32_STM32F4XXX
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select STM32_STM32F401xDE
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select STM32_STM32F401
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select ARCH_HAVE_FPU
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config ARCH_CHIP_STM32F410RB
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bool "STM32F410RB"
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select ARCH_CORTEXM4
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@ -2448,6 +2528,8 @@ config STM32_RNG
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depends on STM32_HAVE_RNG
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select ARCH_HAVE_RNG
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# REVISIT: There are some lower-end STM32F401 parts without SDIO too. Others?
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config STM32_SDIO
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bool "SDIO"
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default n
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