SAMA5: Modification of some CPSR-related inline functions

This commit is contained in:
Gregory Nutt 2013-07-31 09:11:24 -06:00
parent 794e22fba7
commit aa1e0dfe2f
2 changed files with 19 additions and 2 deletions

View File

@ -759,3 +759,20 @@ Configurations
FLASH by closing the BMS jumper (J9). As far as I can tell, this
jumper does nothing on my board??? I have been using the norboot
configuration to start the program in NOR FLASH (see just above).
I do that as follows:
1. I build the norboot configuration and rename nuttx to norboot
2. I build the the ostest configuration and write it to NOR FLASH
using SAM-BA
3. Then I start the J-Link GDB server and GDB. In GDB, I do the
following:
(gdb) mon reset # Reset and halt the CPU
(gdb) load norboot # Load norboot into internal SRAM
(gdb) mon go # Start norboot
(gdb) mon halt # Break in
(gdb) mon reg pc = 0x10000040 # Set the PC to NOR flash entry point
(gdb) mon go # And jump into NOR flash
2013-7-31:
The OS test configuration is functional.

View File

@ -122,12 +122,12 @@ int nor_main(int argc, char *argv)
putreg32(regval, SAM_HSMC_MODE(HSMC_CS0));
/* Interrupts must be disabled through the following. In this configuration,
* there should only be timer interupts. Your NuttX configuration must use
* there should only be timer interrupts. Your NuttX configuration must use
* CONFIG_SERIAL_LOWCONSOLE=y or printf() will hang when the interrupts
* are disabled!
*/
(void)irqdisable();
(void)irqsave();
/* Disable MATRIX write protection */