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Update some comments

This commit is contained in:
Gregory Nutt 2018-09-02 12:34:45 -06:00
parent 5c5b6ab8f6
commit a6f9c6215d
3 changed files with 18 additions and 18 deletions
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32
arch/arm/src/stm32h7/Kconfig
View File

@ -325,8 +325,8 @@ config USART1_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_USART1
@ -363,8 +363,8 @@ config USART2_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_USART2
@ -401,8 +401,8 @@ config USART3_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_USART3
@ -439,8 +439,8 @@ config UART4_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_UART4
@ -477,8 +477,8 @@ config UART5_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_UART5
@ -515,8 +515,8 @@ config USART6_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_USART
@ -553,8 +553,8 @@ config UART7_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_UART7
@ -591,8 +591,8 @@ config UART8_RXFIFO_THRES
5 -> Full
Higher values mean lower interrupt rates and better CPU performance.
Lower values are need at high BAUD rates to prevent Rx data overrun
errors.
Lower values may be needed at high BAUD rates to prevent Rx data
overrun errors.
endif # STM32H7_UART8

2
arch/arm/src/stm32h7/stm32_serial.c
View File

@ -1207,7 +1207,7 @@ static int up_setup(struct uart_dev_s *dev)
regval = up_serialin(priv, STM32_USART_CR3_OFFSET);
regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
/* Set Rx FIFO threshold to empty */
/* Set Rx FIFO threshold to the configured level */
regval |= USART_CR3_RXFTCFG(priv->rxftcfg);

2
configs/metro-m4/README.txt
View File

@ -86,7 +86,7 @@ STATUS
2018-09-01: I found a workaround by substituting OSCULP32K for XOSC32
as the source to GCLK3. With that workaround, the port gets past all
clock and USART configuration. A new configuration option was added,
CONFIG_METRO_M4_32KHZXTAL. By default this workaround is in place.
CONFIG_METRO_M4_32KHZXTAL. By default this workaround is in place.
But you can enable CONFIG_METRO_M4_32KHZXTAL if you want to further
study the XOSC32K problem.