stm32: rename PLLSAI register name to this one in the reference manual
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
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@ -570,15 +570,15 @@
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/* PLLSAI configuration register */
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/* PLLSAI configuration register */
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#define RCC_PLLSAICFG_PLLSAIN_SHIFT (6) /* Bits 6-14: PLLSAI divider (N) for VCO */
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#define RCC_PLLSAICFGR_PLLSAIN_SHIFT (6) /* Bits 6-14: PLLSAI divider (N) for VCO */
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#define RCC_PLLSAICFG_PLLSAIN_MASK (0x1ff << RCC_PLLSAICFG_PLLSAIN_SHIFT)
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#define RCC_PLLSAICFGR_PLLSAIN_MASK (0x1ff << RCC_PLLSAICFGR_PLLSAIN_SHIFT)
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# define RCC_PLLSAICFG_PLLSAIN(n) ((n) << RCC_PLLSAICFG_PLLSAIN_SHIFT)
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# define RCC_PLLSAICFGR_PLLSAIN(n) ((n) << RCC_PLLSAICFGR_PLLSAIN_SHIFT)
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#define RCC_PLLSAICFGR_PLLSAIQ_SHIFT (24) /* Bits 24-27: PLLSAI division factor for SAI clock */
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#define RCC_PLLSAICFGR_PLLSAIQ_SHIFT (24) /* Bits 24-27: PLLSAI division factor for SAI clock */
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#define RCC_PLLSAICFGR_PLLSAIQ_MASK (0x0F << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
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#define RCC_PLLSAICFGR_PLLSAIQ_MASK (0x0F << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
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# define RCC_PLLSAICFG_PLLSAIQ(n) ((n) << RCC_PLLSAICFG_PLLSAIQ_SHIFT)
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# define RCC_PLLSAICFGR_PLLSAIQ(n) ((n) << RCC_PLLSAICFGR_PLLSAIQ_SHIFT)
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#define RCC_PLLSAICFGR_PLLSAIR_SHIFT (28) /* Bits 28-30: PLLSAI division factor for LCD clock */
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#define RCC_PLLSAICFGR_PLLSAIR_SHIFT (28) /* Bits 28-30: PLLSAI division factor for LCD clock */
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#define RCC_PLLSAICFGR_PLLSAIR_MASK (7 << RCC_PLLSAICFGR_PLLSAIR_SHIFT)
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#define RCC_PLLSAICFGR_PLLSAIR_MASK (7 << RCC_PLLSAICFGR_PLLSAIR_SHIFT)
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# define RCC_PLLSAICFG_PLLSAIR(n) ((n) << RCC_PLLSAICFG_PLLSAIR_SHIFT)
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# define RCC_PLLSAICFGR_PLLSAIR(n) ((n) << RCC_PLLSAICFGR_PLLSAIR_SHIFT)
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/* Dedicated clocks configuration register */
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/* Dedicated clocks configuration register */
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