diff --git a/boards/arm/sama5/sama5d2-xult/README.txt b/boards/arm/sama5/sama5d2-xult/README.txt index 728989cbe9..ea42732b36 100644 --- a/boards/arm/sama5/sama5d2-xult/README.txt +++ b/boards/arm/sama5/sama5d2-xult/README.txt @@ -489,7 +489,7 @@ Serial Console ---- ------------------------ ------------- Standard UART on Arduino connector (J21) is FLEXCOM4. - Terminologicy: FLEXCOM is the same as USART in previous SAMA5D versions. + Terminology: FLEXCOM is the same as USART in previous SAMA5D versions. ---- ------- ------------- J21 BOARD SAMA5D2 diff --git a/drivers/mtd/sst39vf.c b/drivers/mtd/sst39vf.c index cbd4e3400e..b814aaf944 100644 --- a/drivers/mtd/sst39vf.c +++ b/drivers/mtd/sst39vf.c @@ -57,6 +57,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Configuration */ #ifndef CONFIG_SST39VF_BASE_ADDRESS @@ -85,6 +86,7 @@ /**************************************************************************** * Private Types ****************************************************************************/ + /* This describes one chip in the SST39VF family */ struct sst39vf_chip_s @@ -125,11 +127,13 @@ struct sst39vf_dev_s /**************************************************************************** * Private Function Prototypes ****************************************************************************/ + /* Low Level Helpers */ static inline void sst39vf_flashwrite(FAR const struct sst39vf_wrinfo_s *wrinfo); static inline uint16_t sst39vf_flashread(uintptr_t address); -static void sst39vf_writeseq(FAR const struct sst39vf_wrinfo_s *wrinfo, int nseq); +static void sst39vf_writeseq(FAR const struct sst39vf_wrinfo_s *wrinfo, + int nseq); static int sst39vf_chiperase(FAR struct sst39vf_dev_s *priv); static int sst39vf_sectorerase(FAR struct sst39vf_dev_s *priv, uintptr_t sectaddr); @@ -159,8 +163,8 @@ static const struct sst39vf_chip_s g_sst39vf1601 = 0x234b, /* chipid */ /* 32, nblocks */ 512, /* nsectors */ - /* 64*1024, blocksize */ - 4*1024, /* sectorsize */ + /* 64 * 1024, blocksize */ + 4 * 1024 /* sectorsize */ }; static const struct sst39vf_chip_s g_sst39vf1602 = @@ -169,8 +173,8 @@ static const struct sst39vf_chip_s g_sst39vf1602 = 0x234a, /* chipid */ /* 32, nblocks */ 512, /* nsectors */ - /* 64*1024, blocksize */ - 4*1024, /* sectorsize */ + /* 64 * 1024, blocksize */ + 4 * 1024 /* sectorsize */ }; static const struct sst39vf_chip_s g_sst39vf3201 = @@ -179,8 +183,8 @@ static const struct sst39vf_chip_s g_sst39vf3201 = 0x235b, /* chipid */ /* 64, nblocks */ 1024, /* nsectors */ - /* 64*1024, blocksize */ - 4*1024, /* sectorsize */ + /* 64 * 1024, blocksize */ + 4 * 1024 /* sectorsize */ }; static const struct sst39vf_chip_s g_sst39vf3202 = @@ -189,8 +193,8 @@ static const struct sst39vf_chip_s g_sst39vf3202 = 0x235a, /* chipid */ /* 64, nblocks */ 1024, /* nsectors */ - /* 64*1024, blocksize */ - 4*1024, /* sectorsize */ + /* 64 * 1024, blocksize */ + 4 * 1024 /* sectorsize */ }; /* This structure holds the state of the MTD driver */ diff --git a/drivers/mtd/w25.c b/drivers/mtd/w25.c index 0245ee9e4e..7fc22f4176 100644 --- a/drivers/mtd/w25.c +++ b/drivers/mtd/w25.c @@ -60,7 +60,9 @@ /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ + /* Configuration ********************************************************************/ + /* Per the data sheet, the W25 parts can be driven with either SPI mode 0 (CPOL=0 * and CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices * can operate in mode 0 or 1. So you may need to specify CONFIG_W25_SPIMODE to @@ -98,6 +100,7 @@ #define W25_JEDEC_ID 0x9f /* JEDEC ID read */ /* W25 Registers ********************************************************************/ + /* Read ID (RDID) register values */ #define W25_MANUFACTURER 0xef /* Winbond Serial Flash */ @@ -179,6 +182,7 @@ #define W25_DUMMY 0xa5 /* Chip Geometries ******************************************************************/ + /* All members of the family support uniform 4K-byte sectors and 256 byte pages */ #define W25_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4Kb */ @@ -919,7 +923,8 @@ static FAR uint8_t *w25_cacheread(struct w25_dev_s *priv, off_t sector) /* Read the erase block into the cache */ - w25_byteread(priv, priv->sector, (esectno << W25_SECTOR_SHIFT), W25_SECTOR_SIZE); + w25_byteread(priv, priv->sector, (esectno << W25_SECTOR_SHIFT), + W25_SECTOR_SIZE); /* Mark the sector as cached */ @@ -1083,14 +1088,16 @@ static ssize_t w25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbl /* On this device, we can handle the block read just like the byte-oriented read */ #ifdef CONFIG_W25_SECTOR512 - nbytes = w25_read(dev, startblock << W25_SECTOR512_SHIFT, nblocks << W25_SECTOR512_SHIFT, buffer); + nbytes = w25_read(dev, startblock << W25_SECTOR512_SHIFT, + nblocks << W25_SECTOR512_SHIFT, buffer); if (nbytes > 0) { nbytes >>= W25_SECTOR512_SHIFT; } #else - nbytes = w25_read(dev, startblock << W25_PAGE_SHIFT, nblocks << W25_PAGE_SHIFT, buffer); + nbytes = w25_read(dev, startblock << W25_PAGE_SHIFT, + nblocks << W25_PAGE_SHIFT, buffer); if (nbytes > 0) { nbytes >>= W25_PAGE_SHIFT; @@ -1188,7 +1195,7 @@ static ssize_t w25_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, /* Write the 1st partial-page */ count = nbytes; - bytestowrite = W25_PAGE_SIZE - (offset & (W25_PAGE_SIZE-1)); + bytestowrite = W25_PAGE_SIZE - (offset & (W25_PAGE_SIZE - 1)); w25_bytewrite(priv, buffer, offset, bytestowrite); /* Update offset and count */ @@ -1238,7 +1245,8 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) { case MTDIOC_GEOMETRY: { - FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg); + FAR struct mtd_geometry_s *geo = + (FAR struct mtd_geometry_s *)((uintptr_t)arg); if (geo) { /* Populate the geometry structure with information need to know @@ -1253,7 +1261,8 @@ static int w25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) #ifdef CONFIG_W25_SECTOR512 geo->blocksize = (1 << W25_SECTOR512_SHIFT); geo->erasesize = (1 << W25_SECTOR512_SHIFT); - geo->neraseblocks = priv->nsectors << (W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT); + geo->neraseblocks = priv->nsectors << + (W25_SECTOR_SHIFT - W25_SECTOR512_SHIFT); #else geo->blocksize = W25_PAGE_SIZE; geo->erasesize = W25_SECTOR_SIZE; diff --git a/drivers/mtd/w25qxxxjv.c b/drivers/mtd/w25qxxxjv.c index 99950ab203..8cbae460a6 100644 --- a/drivers/mtd/w25qxxxjv.c +++ b/drivers/mtd/w25qxxxjv.c @@ -268,9 +268,9 @@ /* Cache flags **********************************************************************/ -#define W25QXXXJV_CACHE_VALID (1 << 0) /* 1=Cache has valid data */ -#define W25QXXXJV_CACHE_DIRTY (1 << 1) /* 1=Cache is dirty */ -#define W25QXXXJV_CACHE_ERASED (1 << 2) /* 1=Backing FLASH is erased */ +#define W25QXXXJV_CACHE_VALID (1 << 0) /* 1=Cache has valid data */ +#define W25QXXXJV_CACHE_DIRTY (1 << 1) /* 1=Cache is dirty */ +#define W25QXXXJV_CACHE_ERASED (1 << 2) /* 1=Backing FLASH is erased */ #define IS_VALID(p) ((((p)->flags) & W25QXXXJV_CACHE_VALID) != 0) #define IS_DIRTY(p) ((((p)->flags) & W25QXXXJV_CACHE_DIRTY) != 0)