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arch:xtena: modify timer interrupt level large to XCHAL_IRQ_LEVEL level. 

Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
zhuyanlin 2022-01-27 15:58:49 +08:00 committed by Xiang Xiao
parent 869d3bfb32
commit 96a70b908f
1 changed files with 5 additions and 5 deletions
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10
arch/xtensa/src/common/xtensa_timer.h
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@ -62,25 +62,25 @@
#ifndef XT_TIMER_INDEX
# if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
# if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
# if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_IRQ_LEVEL
# undef XT_TIMER_INDEX
# define XT_TIMER_INDEX 3
# endif
# endif
# if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
# if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
# if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_IRQ_LEVEL
# undef XT_TIMER_INDEX
# define XT_TIMER_INDEX 2
# endif
# endif
# if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
# if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
# if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_IRQ_LEVEL
# undef XT_TIMER_INDEX
# define XT_TIMER_INDEX 1
# endif
# endif
# if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
# if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
# if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_IRQ_LEVEL
# undef XT_TIMER_INDEX
# define XT_TIMER_INDEX 0
# endif
@ -97,7 +97,7 @@
#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
# error "The timer selected by XT_TIMER_INDEX does not exist in this core."
#elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
#elif XT_TIMER_INTPRI > XCHAL_IRQ_LEVEL
# error "The timer interrupt cannot be high priority (use medium or low)."
#endif