From 944bb6164d7f5345a66993bbcb9dba908fbe6c7a Mon Sep 17 00:00:00 2001 From: Roberto Bucher Date: Sat, 29 Oct 2022 07:16:05 +0200 Subject: [PATCH] Files for pysimCoder on nucleo-h743zi2 --- arch/arm/src/stm32h7/stm32_adc.c | 12 ++++++------ arch/arm/src/stm32h7/stm32_qencoder.c | 2 +- .../arm/stm32h7/nucleo-h743zi2/src/nucleo-h743zi2.h | 12 ++++++++++-- boards/arm/stm32h7/nucleo-h743zi2/src/stm32_pwm.c | 2 +- 4 files changed, 18 insertions(+), 10 deletions(-) diff --git a/arch/arm/src/stm32h7/stm32_adc.c b/arch/arm/src/stm32h7/stm32_adc.c index f98c8018e2..5af91ab934 100644 --- a/arch/arm/src/stm32h7/stm32_adc.c +++ b/arch/arm/src/stm32h7/stm32_adc.c @@ -1478,14 +1478,14 @@ static int adc_setup(struct adc_dev_s *dev) leave_critical_section(flags); - ainfo("ISR: 0x%08" PRIx32 " CR: 0x%08" PRIx32 " \ - CFGR: 0x%08" PRIx32 " CFGR2: 0x%08" PRIx32 "\n", + ainfo("ISR: 0x%08" PRIx32 " CR: 0x%08" PRIx32 " " + "CFGR: 0x%08" PRIx32 " CFGR2: 0x%08" PRIx32 "\n", adc_getreg(priv, STM32_ADC_ISR_OFFSET), adc_getreg(priv, STM32_ADC_CR_OFFSET), adc_getreg(priv, STM32_ADC_CFGR_OFFSET), adc_getreg(priv, STM32_ADC_CFGR2_OFFSET)); - ainfo("SQR1: 0x%08" PRIx32 " SQR2: 0x%08" PRIx32 " \ - SQR3: 0x%08" PRIx32 " SQR4: 0x%08" PRIx32 "\n", + ainfo("SQR1: 0x%08" PRIx32 " SQR2: 0x%08" PRIx32 " " + "SQR3: 0x%08" PRIx32 " SQR4: 0x%08" PRIx32 "\n", adc_getreg(priv, STM32_ADC_SQR1_OFFSET), adc_getreg(priv, STM32_ADC_SQR2_OFFSET), adc_getreg(priv, STM32_ADC_SQR3_OFFSET), @@ -1856,8 +1856,8 @@ static int adc_interrupt(struct adc_dev_s *dev, uint32_t adcisr) value = adc_getreg(priv, STM32_ADC_DR_OFFSET); value &= ADC_DR_MASK; - awarn("WARNING: Analog Watchdog, Value (0x%03" PRIx32 ") \ - out of range!\n", value); + awarn("WARNING: Analog Watchdog, Value (0x%03" PRIx32 ") " + "out of range!\n", value); /* Stop ADC conversions to avoid continuous interrupts */ diff --git a/arch/arm/src/stm32h7/stm32_qencoder.c b/arch/arm/src/stm32h7/stm32_qencoder.c index f9fd0d2375..307b4035b0 100644 --- a/arch/arm/src/stm32h7/stm32_qencoder.c +++ b/arch/arm/src/stm32h7/stm32_qencoder.c @@ -987,7 +987,7 @@ static int stm32_shutdown(struct qe_lowerhalf_s *lower) putreg32(regval, regaddr); leave_critical_section(flags); - sninfo("regaddr: %08" PRIx32 " resetbit: %08" PRIx32 "\n", \ + sninfo("regaddr: %08" PRIx32 " resetbit: %08" PRIx32 "\n", regaddr, resetbit); stm32_dumpregs(priv, "After stop"); diff --git a/boards/arm/stm32h7/nucleo-h743zi2/src/nucleo-h743zi2.h b/boards/arm/stm32h7/nucleo-h743zi2/src/nucleo-h743zi2.h index 4e399f1f8a..221d2a1c5e 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/src/nucleo-h743zi2.h +++ b/boards/arm/stm32h7/nucleo-h743zi2/src/nucleo-h743zi2.h @@ -129,9 +129,9 @@ /* PWM */ #if defined(CONFIG_STM32H7_TIM1_PWM) -# define NUCLEOH743ZI2_PWMTIMER 1 +# define NUCLEOH743ZI2_PWMTIMER 1 #else -# define NUCLEOH743ZI2_PWMTIMER 3 +# define NUCLEOH743ZI2_PWMTIMER 3 #endif /**************************************************************************** @@ -217,6 +217,14 @@ int stm32_usbhost_initialize(void); int stm32_pwm_setup(void); #endif +/**************************************************************************** + * Name: stm32_qencoder_initialize + * + * Description: + * Initialize and register a qencoder + * + ****************************************************************************/ + #ifdef CONFIG_SENSORS_QENCODER int stm32_qencoder_initialize(const char *devpath, int timer); #endif diff --git a/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_pwm.c b/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_pwm.c index cdf647357c..b4a09a4938 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_pwm.c +++ b/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_pwm.c @@ -74,7 +74,7 @@ int stm32_pwm_setup(void) /* Get an instance of the PWM interface */ pwm = stm32_pwminitialize(NUCLEOH743ZI2_PWMTIMER); - if (!pwm) + if (pwm == NULL) { tmrerr("ERROR: Failed to get the STM32 PWM lower half\n"); return -ENODEV;