diff --git a/arch/arm/src/efm32/efm32_clockconfig.c b/arch/arm/src/efm32/efm32_clockconfig.c
index 91c006ec08..22d841605f 100644
--- a/arch/arm/src/efm32/efm32_clockconfig.c
+++ b/arch/arm/src/efm32/efm32_clockconfig.c
@@ -89,37 +89,6 @@
  * Private Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: efm32_synchronize
- *
- * Description:
- *   Wait for ongoing sync of register(s) to low frequency domain to
- *   complete.
- *
- * Input Parameters:
- *   bitset - Bitset corresponding to SYNCBUSY register defined bits,
- *            indicating registers that must complete any ongoing
- *            synchronization.
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-static inline void efm32_synchronize(uint32_t bitset)
-{
-  /* Avoid deadlock if modifying a register again after freeze mode is
-   * activated.
-   */
-
-  if ((getreg32(EFM32_CMU_FREEZE) & CMU_FREEZE_REGFREEZE) == 0)
-    {
-      /* Wait for any pending previous write operation to complete */
-
-      while ((getreg32(EFM32_CMU_SYNCBUSY) & bitset) != 0);
-    }
-}
-
 /****************************************************************************
  * Name: efm32_statuswait
  *
@@ -182,6 +151,7 @@ static void efm32_enable_hfxo(void)
   efm32_statuswait(CMU_STATUS_HFXORDY);
 }
 
+#ifdef CONFIG_ARMV7M_ITMSYSLOG
 static inline void efm32_enable_auxhfrco(void)
 {
   /* Enable the HFXO */
@@ -189,6 +159,7 @@ static inline void efm32_enable_auxhfrco(void)
   putreg32(CMU_OSCENCMD_AUXHFRCOEN, EFM32_CMU_OSCENCMD);
   efm32_statuswait(CMU_STATUS_AUXHFRCORDY);
 }
+#endif
 
 /****************************************************************************
  * Name: efm32_enable_leclocking