Updates for STM3210E-EVAL SRAM

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4579 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-04-09 19:38:26 +00:00
parent 8e47b15a30
commit 8e32c1ec11
3 changed files with 132 additions and 102 deletions

View File

@ -16,6 +16,7 @@ Contents
- LEDs
- Temperature Sensor
- RTC
- FSMC SRAM
- STM3210E-EVAL-specific Configuration Options
- Configurations
@ -350,6 +351,21 @@ RTC
overflow interrupt may be lost even if the STM32 is powered down only momentarily.
Therefore hi-res solution is only useful in systems where the power is always on.
FSMC SRAM
=========
The 8-Mbit SRAM is connected to the STM32 at PG10 which will be FSMC_NE3, Bank1
SRAM3. This memory will appear at address 0x68000000.
The on-board SRAM can be configured by setting
CONFIG_STM32_FSMC=y : Enables the FSMC
CONFIG_STM32_FSMC_SRAM=y : Enable external SRAM support
CONFIG_HEAP2_BASE=0x68000000 : SRAM will be located at 0x680000000
CONFIG_HEAP2_END=(0x68000000+(1*1024*1024)) : The size of the SRAM is 1Mbyte
CONFIG_MM_REGIONS=2 : There will be two memory regions
: in the heap
STM3210E-EVAL-specific Configuration Options
============================================

View File

@ -144,6 +144,14 @@
# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* SRAM definitions *****************************************************************/
/* The 8 Mbit SRAM is provided on the PT3 board using the FSMC_NE3 chip select. */
/* This is the Bank1 SRAM3 address: */
#define BOARD_SRAM_BASE 0x68000000 /* Bank2 SRAM3 base address */
#define BOARD_SRAM_SIZE (1*1024*1024) /* 8-Mbit = 1-Mbyte */
/* LED definitions ******************************************************************/
/* The STM3210E-EVAL board has 4 LEDs that we will encode as: */

View File

@ -2,8 +2,8 @@
* configs/stm3210e-eval/src/up_boot.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -71,6 +71,12 @@
void stm32_boardinitialize(void)
{
/* If the FSMC and FSMC_SRAM are selected, then enable SRAM access */
#if defined(CONFIG_STM32_FSMC) && defined(CONFIG_STM32_FSMC_SRAM)
stm32_selectsram();
#endif
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.
*/